LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
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4.4.3 I
2
S (Audio)
Type
Level
Domain
PD
I2S0 Left & Right synchronization
clock
Module Output if CPU acts in Master Mode
Module Input if CPU acts in Slave Mode
I2S0 Digital audio Output
Module Output if CPU acts in Master Mode
Module Input if CPU acts in Slave Mode
Master clock output to I2S
codec(s)
Note: Support for I2S1 signalling has been removed during update to SMARC 2.0 specification