If the output voltage is less than the programmed voltage
,the junction goes positive causing U347/377 to produce a
negative going CV control signal . For this condition ,the
base drive circuit will conduct less allowing more current to
flow into the +BASE DRIVE input. This will cause the power
module’ s series regulator to conduct more and thus increase
the output voltage.
2-47 Current Control Circuit. When the output is operating
in the constant current mode, this circuit generates the +CL
control and the +CL LOOP signals. The +Cl control signal is
applies through OR gate diode CR348 to control the base
drive circuit in order to regulate the output current. The +CL
LOOP signal is sent back to the secondary interface circuit to
indicate that the output is in the constant current mode of
operation.
The current control circuit receives an input from peak
current limit circuit (in the current sourcing mode only) as
shown in figure 2-5. When the peak current limit circuit (see
paragraph 2-42) is activated, it immediately limit the
conduction of the series regulators in the power module.
2-48 Negative Current Limit Circuit. This circuit provides a
limit to the amount of current that the supply can sink. The
circuit may be activates, if a current source such as another
power supply (or energy storage capacitor) is connected
across the output terminals and its voltage is greater that the
programmed output voltage.
When the output is in negative current limit, this circuit
generates the – CL control and the – CL LOOP signal. The –
CL control signal is applied through diode CR354 to the base
drive circuit. The – CL LOOP signal is sent back to the
secondary interface to indicate that the output is in the
negative current limit mode.
As shown in the simplified schematic of figure 2-6, the
negative current limit circuit consist mainly of an open
collector toggle comparator (part of U351) and –CL error
amplifier (U350).
U375 acts as a clamp to ensure the –CL Summing junction
(S3) does not exceed +10mV.
The voltage drop ( +SHUNT-which is a negative voltage
when sinking current) across the current monitoring resistor
R408 is applied to summing junction S3 along with a
reference voltage. Based on this summing action, error
amplifier U350 generates the –CL control signal which is
applied through diode CR354 to control the base drive
circuit.
For the 50W outputs, comparator U351 toggles the reference
voltage between the 1.1 and 2.2 Amp range levels. This is
required because the output board has two fixed ranges (a
high voltage/low current and a low voltage /high current).
As you can see in Fig.2-7, a 50W output can sink up to 2.2A
when its output is below 26V, and up to 1.1 A when its
output is approximately 26V.
Notice in Figure 2-8 on the 25W/.5A graph, the 15 ohm
slope {approximate} (11 ohms for the 50W/2S outputs), is
due to the resistor R457 in series with FET Q342 and the –
0.01 Amps at VOUT equals zero volts, represents the bleed
current in Q341.
2-50 Overvoltage Protection Circuits. These circuits
generate the OV GATE signal which fires the SCR in the
power module and shuts down the output. Figure 2-9 is a
simplified schematic of the overvoltage protection circuits
which are comprised mainly of: a fixed overvoltage sensing
circuit (U354) and divider (R357/R359) that compares the
OV DAC signal to the output voltage, signal processor U327,
diodes CR356-CR360, and pulse transformer (T301) that
couples CR356-CR360, and pulse transformer (T301) that
couples the remote trip signals that are sent/received via the
+OV and –OV terminals.
As shown in Figure 2-9, the main input to the overvoltage
protection circuits in the OV DRIVE signal which is received
from the overvoltage detector (P/O U327, see paragraph 2-
32). The OV DRIVE signal goes high to activate the OV
GATE signal which is sent via diode CR357 to fire the SCR
in the power module. The conditions which activate OV
DRIVE are described in the following paragraphs.
2-15
_______
_______
The current control circuit compares the output current to a
programmable reference voltage (CC PROG). This
comparison produces the + CL control signal. In order to
make this comparison, the circuit monitors the voltage (+
SHUNT) across current monitoring resistor R408. This
voltage drop is proportional to the amount of output
current. The +SHUNT and +CL PROG signal are connected
through scaling resistors to summing point S2 for
application to U346 (CC Error Amplifier) as show in figure
2-6. Based on this summing action, U346 generates the +CL
control signal which is applied to the base drive circuit via
buffer amplifier U376 and OR gate diode CR348 to control
conduction of the series regulators in the power module in
the same way as described above for the voltage control
circuit. The +SHUNT signal is also sent back to the
secondary interface to indicate the magnitude of the output
current.
U351 will be 15V, resulting in a higher sink current limit
(about –2.2A). R476 provides a small amount of positive
feedback (hysteresis) to prevent “jitter” at the switch point
2-49 FET Downprogrammer. When the output voltage
drops below approximately 4V (approximately 2 volts for
the 50W outputs), the Down Programming circuit comes on
(current sinking characteristics are shown in Figure 2-8). The
FET Downprogrammer circuit (part of U351A/Q342,R456),
is connected across the output. Divider R464/R462 senses
when the output falls below 4 Volts (approximately 2V for
the 50W outputs). This turns on U351A and FET Q342 and
connects R457 across the output to aid downprogramming.
U351 constantly monitors the output voltage in order to
provide the proper reference voltage to the summing
junction of U350. If the output voltage is in the high range,
the open collector output of U351 will be near ground;
thereby dividing down the VREF voltage to summing
junction S3 resulting in a lower sink current limit of –1.1A. If
the output voltage is in the low range, the collector output of
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