2-14
LOOP signal is sent back to the secondary interface circuit to
indicate that the output is in the constant voltage mode of
operation. The voltage control circuit compares the output
voltage to the programmable reference voltage CV PROG to
produce the CV signal. As shown in the simplified
schematic of Figure 2-6, the major components in the voltage
control circuit are: unity gain buffer (U378 and inverter
amplifier U372), output sence buffer U373 (who used for – 5
guard), inverting differential amplifier U352A, and CV error
amplifier U347. The reference voltage (CV PROG, 0 to –10 V)
is applied to U372 which produces a 0 to + 10 V signal
feeding into the summing junction S1 (U347-2). The output
voltage is monitored by U352A which produces a 0 to - 10 V
signal that represents the output voltage magnitude which is
also fed into S1. The 0 to –10 V signal is also sent back (V
READBACK) to the secondary interface to indicate the
magnitude of the output voltage.
If the output voltage exceeds the programmed voltage, the
summing junction goes negative, causing U347/U377 to
produce a positive going CV control signal. For this
condition, the base drive circuits will conduct more and pull
current away from the power module’s + BASE DRIVE
input via the – DRIVE input line. This will cause the power
module’s series regulators to conduct less and thus reduce
the output voltage.
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