ANAN-G2 Manual Page 6 of 35
1.2 Architecture
1. Your radio hardware provides a transmit/receive path. There are two fully separate RX paths
each with its own signal conditioning, digitising and processing.
2. Received signals are filtered, attenuated then digitised using two high performance
analogue-to-digital converter. The A-D converters cover the whole HF band. Digital
processing in the Field Programmable Gate Array (FPGA) converts a part of the HF band to
zero centre frequency, and transfers the data to the PC via Ethernet. The bandwidth
provided can be selected, but is usually in the range 48KHz – 1.536MHz.
3. A Raspberry pi4 Compute Module provides a local, high performance processor. The Pi runs
desktop linux and can host many applications. A high performance PCI Express interface
moves data between the FPGA and the Pi.
4. A client Software Defined Radio application (for example piHPSDR or Thetis) connects to the
receiver data streams and provides further signal processing to reduce noise, to select the
signals of interest and demodulate them. Its user interface provides a view of the band
activity in the downconverted signal is shown, and controls to tune to the required signal
and demodulate it successfully.
5. Received audio is routed to the speaker connectors. Additional PC connected speakers are
also possible.
6. On transmit, the client application provides the initial signal processing to optimise the
transmit signal. Audio processing is available to enhance a voice signal. A CW keyer is
provided. Sampled data is sent to the radio hardware via PCI Express.
7. The radio hardware upconverts the TX signal to the required frequency, sets its signal level,
amplifies and filters it. Amplifier linearization is available: a sample of the signal from the
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