Atmel 8051 - Page 62

The 8051 Instruction Set
1-61 Atmel 8051 Microcontrollers Hardware Manual
4316B–8051–02/04
1.14.50 XCHD A,@R
i
XCH A,direct
Bytes: 2
Cycles: 1
Encoding: 11000101 direct address
Operation: XCH
(A)
D (direct)
XCH A,@R
i
Bytes: 1
Cycles: 1
Encoding: 1100011 i
Operation: XCH
(A)
D ((R
i
))
Function: Exchange Digit
Description: XCHD exchanges the low-order nibble of the Accumulator (bits 3 through 0), generally representing a
hexadecimal or BCD digit, with that of the internal RAM location indirectly addressed by the specified register.
The high-order nibbles (bits 7-4) of each register are not affected. No flags are affected.
Example: R0 contains the address 20H. The Accumulator holds the value 36H (00110110B). Internal RAM location 20H
holds the value 75H (01110101B). The following instruction,
XCHD A,@R0
leaves RAM location 20H holding the value 76H (01110110B) and 35H (00110101B) in the Accumulator.
Bytes: 1
Cycles: 1
Encoding: 1101011 i
Operation: XCHD
(A
3-0
) D ((R
i3-0
))