232
8271D–AVR–05/11
ATmega48A/PA/88A/PA/168A/PA/328/P
Figure 22-12. Formats and States in the Master Transmitter Mode
22.7.2 Master Receiver Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see Figure 22-13). In order to enter a Master mode, a START condition must be transmit-
ted. The format of the following address packet determines whether Master Transmitter or
Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R
is transmitted, MR mode is entered. All the status codes mentioned in this section assume that
the prescaler bits are zero or are masked to zero.
S SLA W A DATA A P
$08
$18 $28
R SLA W
$10
AP
$20
P
$30
A or A
$38
A
Other master
continues
A or A
$38
Other master
continues
R
A
$68
Other master
continues
$78 $B0
To corresponding
states in slave mode
MT
M
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
DATA A
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
rescaler bits are zero or masked to zero
S