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Atmel AT90S2313 User Manual

Atmel AT90S2313
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1
Features
Utilizes the AVR
®
RISC Architecture
AVR - High-performance and Low-power RISC Architecture
118 Powerful Instructions - Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Up to 10 MIPS Throughput at 10 MHz
Data and Nonvolatile Program Memory
2K Bytes of In-System Programmable Flash
Endurance 1,000 Write/Erase Cycles
128 Bytes of SRAM
128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
One 8-bit Timer/Counter with Separate Prescaler
One 16-bit Timer/Counter with Separate Prescaler,
Compare, Capture Modes and 8-, 9- or 10-bit PWM
On-chip Analog Comparator
Programmable Watchdog Timer with On-chip Oscillator
SPI Serial Interface for In-System Programming
Full Duplex UART
• Special Microcontroller Features
Low-power Idle and Power Down Modes
External and Internal Interrupt Sources
• Specifications
Low-power, High-speed CMOS Process Technology
Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
Active: 2.8 mA
Idle Mode: 0.8 mA
Power Down Mode: <1 µA
I/O and Packages
15 Programmable I/O Lines
20-pin PDIP and SOIC
Operating Voltages
2.7 - 6.0V (AT90S2313-4)
4.0 - 6.0V (AT90S2313-10)
Speed Grades
0 - 4 MHz (AT90S2313-4)
0 - 10 MHz (AT90S2313-10)
Description
The AT90S2313 is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. By executing powerful instructions in a single clock cycle, the
Rev. 0839E–04/99
8-bit
Microcontroller
with 2K bytes
In-System
Programmable
Flash
AT90S2313
Pin Configuration
PDIP/SOIC
(continued)
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Atmel AT90S2313 Specifications

General IconGeneral
BrandAtmel
ModelAT90S2313
CategoryMicrocontrollers
LanguageEnglish

Summary

Features of AT90S2313 Microcontroller

AVR RISC Architecture

High-performance, low-power RISC architecture with single clock cycle execution.

Memory Features

2K Flash, 128B SRAM, 128B EEPROM with endurance specifications.

Peripheral Features

Includes timers, PWM, comparator, Watchdog, SPI, and UART modules.

Pin Configuration

Pin Descriptions

Architectural Overview

General Purpose Register File

In-System Programmable Flash Program Memory

EEPROM Data Memory

SRAM Data Memory Organization

Program and Data Addressing Modes

Memory Access and Instruction Execution Timing

I/O Memory Map

Status Register - SREG

Reset and Interrupt Handling

Reset Sources

Power-On Reset

External Reset

Watchdog Reset

Interrupt Handling

External Interrupts

MCU Control Register - MCUCR

Sleep Modes

Power Down Mode

Oscillator stopped; wake-up via external reset or interrupt.

Timer/Counters Overview

8-bit Timer/Counter0

Timer/Counter0 Control Register - TCCR0

16-bit Timer/Counter1

Timer/Counter1 Control Register A - TCCR1A

Timer/Counter1 Control Register B - TCCR1B

Timer/Counter1 - TCNT1H and TCNT1L

Timer/Counter1 Output Compare Register A

Timer/Counter1 Input Capture Register

Timer/Counter1 in PWM Mode

Watchdog Timer Functionality

Watchdog Timer Control Register - WDTCR

EEPROM Read/Write Access

EEPROM Control Register - EECR

Prevent EEPROM Corruption

UART Overview

UART Data Reception

UART Control

UART Control Register - UCR

Baud Rate Generator Functionality

Analog Comparator Overview

Analog Comparator Control and Status Register - ACSR

Analog Comparator Control Bits

Port B Description

Alternate Functions of Port B

Port D Description

Alternate Functions of Port D

Memory Programming Overview

Fuse Bits Configuration

Programming the Flash and EEPROM

Parallel Programming Interface

Enter Programming Mode

Chip Erase Procedure

Programming the Flash Memory

Reading the Flash Memory

Programming the EEPROM Memory

Reading the EEPROM Memory

Programming the Fuse Bits

Programming the Lock Bits

Parallel Programming Characteristics

Serial Downloading Procedure

Serial Programming Algorithm

Serial Programming Characteristics

Electrical Characteristics

Absolute Maximum Ratings

Operating limits to prevent device damage.

DC Characteristics

Register Summary

Instruction Set Summary

Instruction Set Summary (Continued)

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