AT90S2313
2
AT90S2313 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consump-
tion versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly
connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction
executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers.
Figure 1. The AT90S2313 Block Diagram
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