AT90S2313
45
UART Baud Rate Register - UBRR
The UBRR register is an 8-bit read/write register which specifies the UART Baud Rate according to the formula on the pre-
vious page.
Analog Comparator
The analog comparator compares the input values on the positive input AIN0 (PB0) and the negative input PB1(AIN1).
When the voltage on the positive input PB0 (AIN0) is higher than the voltage on the negative input PB1 (AIN1), the Analog
Comparator Output, ACO is set (one). The comparator’s output can be set to trigger the Timer/Counter1 Input Capture
function. In addition, the comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The user can
select Interrupt triggering on comparator output rise, fall or toggle. A block diagram of the comparator and its surrounding
logic is shown in Figure 37.
Figure 37. Analog Comparator Block Diagram
Analog Comparator Control and Status Register - ACSR
•
Bit 7 - ACD: Analog Comparator Disable
When this bit is set (one), the power to the analog comparator is switched off. This bit can be set at any time to turn off the
analog comparator. This will reduce power consumption in active and idle mode. When changing the ACD bit, the Analog
Comparator Interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
•
Bit 6 - Res: Reserved bit
This bit is a reserved bit in the AT90S2313 and will always read as zero.
•
Bit 5 - ACO: Analog Comparator Output
ACO is directly connected to the comparator output.
Bit 76543210
$09 ($29) MSB LSB UBRR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
Bit 76543210
$08 ($28) ACD - ACO ACI ACIE ACIC ACIS1 ACIS0 ACSR
Read/Write R/W R R R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
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