Atmel AVR AT90CAN128 - User Manual

Features
• High-performance, Low-power AVR
®
8-bit Microcontroller
• Advanced RISC Architecture
– 133 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers + Peripheral Control Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
• Non volatile Program and Data Memories
– 32K/64K/128K Bytes of In-System Reprogrammable Flash (AT90CAN32/64/128)
• Endurance: 10,000 Write/Erase Cycles
– Optional Boot Code Section with Independent Lock Bits
• Selectable Boot Size: 1K Bytes, 2K Bytes, 4K Bytes or 8K Bytes
• In-System Programming by On-Chip Boot Program (CAN, UART, ...)
• True Read-While-Write Operation
– 1K/2K/4K
Bytes EEPROM (Endurance: 100,000 Write/Erase Cycles) (AT90CAN32/64/128)
– 2K/4K/4K Bytes Internal SRAM (AT90CAN32/64/128)
– Up to 64K Bytes Optional External Memory Space
– Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Programming Flash (Hardware ISP), EEPROM, Lock & Fuse Bits
– Extensive On-chip Debug Support
• CAN Controller 2.0A & 2.0B - ISO 16845 Certified
(1)
– 15 Full Message Objects with Separate Identifier Tags and Masks
– Transmit, Receive, Automatic Reply and Frame Buffer Receive Modes
– 1Mbits/s Maximum Transfer Rate at 8 MHz
– Time stamping, TTC & Listening Mode (Spying or Autobaud)
• Peripheral Features
– Programmable Watchdog Timer with On-chip Oscillator
– 8-bit Synchronous Timer/Counter-0
• 10-bit Prescaler
• External Event Counter
• Output Compare or 8-bit PWM Output
– 8-bit Asynchronous Timer/Counter-2
• 10-bit Prescaler
• External Event Counter
• Output Compare or 8-Bit PWM Output
• 32Khz Oscillator for RTC Operation
– Dual 16-bit Synchronous Timer/Counters-1 & 3
• 10-bit Prescaler
• Input Capture with Noise Canceler
• External Event Counter
• 3-Output Compare or 16-Bit PWM Output
• Output Compare Modulation
– 8-channel, 10-bit SAR ADC
• 8 Single-ended Channels
• 7 Differential Channels
• 2 Differential Channels With Programmable Gain at 1x, 10x, or 200x
– On-chip Analog Comparator
– Byte-oriented Two-wire Serial Interface
– Dual Programmable Serial USART
– Master/Slave SPI Serial Interface
• Programming Flash (Hardware ISP)
• Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– 8 External Interrupt Sources
– 5 Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down & Standby
– Software Selectable Clock Frequency
– Global Pull-up Disable
• I/O and Packages
– 53 Programmable I/O Lines
– 64-lead TQFP and 64-lead QFN
• Operating Voltages: 2.7 - 5.5V
• Operating temperature: Industrial (-40°C to +85°C)
• Maximum Frequency: 8 MHz at 2.7V, 16 MHz at 4.5V
Note: 1. Details on section 19.4.3 on page 242.
Rev. 7679H–CAN–08/08
8-bit
Microcontroller
with
32K/64K/128K
Bytes of
ISP Flash
and
CAN Controller
AT90CAN32
AT90CAN64
AT90CAN128

Summary

Description

Part Description

Overview of the microcontroller's architecture, features, and capabilities.

Block Diagram

Visual representation of the microcontroller's internal architecture and key modules.

Pin Configurations

Detailed pinout and physical layout of the microcontroller package options.

AVR CPU Core

Architectural Overview

Explanation of the Harvard architecture, pipelining, and instruction execution.

General Purpose Register File

Description of the 32 general-purpose working registers and their data memory mapping.

Reset and Interrupt Handling

Covers system reset sources, interrupt vectors, and interrupt handling procedures.

Memories

In-System Reprogrammable Flash Program Memory

Details the Flash memory organization, endurance, and security features.

SRAM Data Memory

Describes the SRAM organization, data access, and timing characteristics.

EEPROM Data Memory

Information on EEPROM organization, read/write access, and address registers.

System Clock

Clock Systems and their Distribution

Overview of clock sources, distribution, and their impact on power consumption.

System Clock Prescaler

Power Management and Sleep Modes

Minimizing Power Consumption

System Control and Reset

Reset

Watchdog Timer

Interrupts

Interrupt Vectors in AT90 CAN32;64;128

I;O-Ports

Ports as General Digital I;O

Register Description for I;O-Ports

Controller Area Network - CAN

CAN Controller

Describes the full-CAN controller's hardware for acceptance filtering and message management.

Error Management

Analog to Digital Converter - ADC

Operation

JTAG Interface and On-chip Debug System

TAP Controller

Using the JTAG Programming Capabilities

Memory Programming

Parallel Programming Overview

Parallel Programming

Electrical Characteristics (1)

Absolute Maximum Ratings*

Specifies the absolute maximum ratings to prevent device damage, including operating voltage and temperature.

DC Characteristics

Two-wire Serial Interface Characteristics

AT90 CAN32;64;128 Typical Characteristics

Register Summary

Instruction Set Summary

Atmel AVR AT90CAN128 Specifications