AT90S2313
17
I/O Memory
The I/O space definition of the AT90S2313 is shown in the following Table 1:
Note: Reserved and unused locations are not shown in the table.
Table 1. AT90S2313 I/O Space
Address Hex Name Function
$3F ($5F) SREG Status Register
$3D ($5D) SPL Stack Pointer Low
$3B ($5B) GIMSK General Interrupt MaSK register
$3A ($5A) GIFR General Interrupt Flag Register
$39 ($59) TIMSK Timer/Counter Interrupt MaSK register
$38 ($58) TIFR Timer/Counter Interrupt Flag register
$35 ($55) MCUCR MCU general Control Register
$33 ($53) TCCR0 Timer/Counter 0 Control Register
$32 ($52) TCNT0 Timer/Counter 0 (8-bit)
$2F ($4F) TCCR1A Timer/Counter 1 Control Register A
$2E ($4E) TCCR1B Timer/Counter 1 Control Register B
$2D ($4D) TCNT1H Timer/Counter 1 High Byte
$2C ($4C) TCNT1L Timer/Counter 1 Low Byte
$2B ($4B) OCR1AH Output Compare Register 1 High Byte
$2A ($4A) OCR1AL Output Compare Register 1 Low Byte
$25 ($45) ICR1H T/C 1 Input Capture Register High Byte
$24 ($44) ICR1L T/C 1 Input Capture Register Low Byte
$21 ($41) WDTCR Watchdog Timer Control Register
$1E ($3E) EEAR EEPROM Address Register
$1D ($3D) EEDR EEPROM Data Register
$1C ($3C) EECR EEPROM Control Register
$18 ($38) PORTB Data Register, Port B
$17 ($37) DDRB Data Direction Register, Port B
$16 ($36) PINB Input Pins, Port B
$12 ($32) PORTD Data Register, Port D
$11 ($31) DDRD Data Direction Register, Port D
$10 ($30) PIND Input Pins, Port D
$0C ($2C) UDR UART I/O Data Register
$0B ($2B) USR UART Status Register
$0A ($2A) UCR UART Control Register
$09 ($29) UBRR UART Baud Rate Register
$08 ($28) ACSR Analog Comparator Control and Status Register