BCI Capnocheck Plus - Page 17

Chapter 3: Capnocheck Plus Circuit Description
The Page Selector includes a Page Register - a five bit output port, in which the
microprocessor stores the page number. Hence, a total of 32 pages exists. The
total RAM size is 128 kbytes, each page is 4 kbytes long. The Page Selector is
configured such that the first three pages can exist as “solid” 12 kbytes of
memory, which allows a large amount of data to be located in continuous
memory.
RAM Address Space RAM Page
20000 .. 20FFF Page 0
21000 .. 21FFF Page1
22000 .. 22FFF Page 2
23000 .. 23FFF Pages 0..31
By writing a page number into the Page Register, address space 23000 .. 23FFF
can be assigned to any of 32 pages. As seen from the table, RAM pages 0, 1
and 2 can be either part of 12kbytes of continuous address space, or can be
selected together with other pages to reside in the top 4kbytes (address 23000 ..
23FFF). For practical reasons, they are always accessed as continuous memory.
The address decoder for the Input / Output Interface devices is implemented in
FPGA U4. The corresponding section of FPGA is shown on the following
drawing:
Capnocheck Plus Service Manual 3-3