Biostar B350GT3 - 2.2 Install a Heatsink

2. Advanced Menu | 9
B350GT3 & X370GT3
Zen Common Opons
RedirectForReturnDis
This item from a workaround for GCC/C000005 issue for XV Core on CZ A0, seng
MSRC001_1029 Decode Conguraon (DE_CFG) bit 14 [DecfgNoRdrctForReturns] to 1.
Opons: Auto (Default) / 1 / 0
L2 TLB Associavity
This item 0 - L2 TLB ways [11:8] are fully associave. 1 - L2 TLB ways [11:8] are 4K-only.
Opons: Auto (Default) / 1 / 0
Plaorm First Error Handling
This item enabled or disabled PFEH, cloak individual banks, and mask deferred error interrupts
from each bank.
Opons: Auto (Default) / Enabled / Disabled
Core Performance Boost
This item allows you to set the Core Performance Boost funcon.
Opons: Auto (Default) / Disabled
Downcore control
This item allows you to set the number of Cores to be used.
Opons: Auto (Default) / TWO (1 + 1) / TWO (2 + 0) / THREE (3 + 0) / FOUR (2 + 2) / FOUR (4 + 0)
/ SIX (3 + 3)
Enable IBS
This item allows you to set the Enable IBS.
Opons: Auto (Default) / Enabled / Disabled
Global C-state Control
This item allows you to controls IO based C-state generaon and DF C-states.
Opons: Auto (Default) / Enabled / Disabled
Instrucon Branch Predicon
This item allows you to control the Instrucon Branch Predicon feature.
Opons: Auto (Default) / Enabled / Disabled