M
M
M
7
7
7
V
V
V
I
I
I
G
G
G
4
4
4
0
0
0
0
0
0
Note: Because the overclock, overvoltage, and hardware monitor features
are controlled by several separate chipset, [ WarpSpeeder™ ] divide these
features to separate panels. If one chipset is not on board, the correlative
button in Main panel will be disabled, but will not interfere other panels’
functions. This property can make [ WarpSpeeder™ ] utility more robust.
24
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