Biostar N68S3B

N68S3B BIOS Manual
33
Memory Configuration
BIOS SETUP UTILITY
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
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Memory Configuration
Bank Interleaving [Auto]
Channel Interleaving [XOR of Address bit]
Enable Clock to All DIMMs [Disabled]
MemClk Tristate C3/ATLVID [Disabled]
Memory Hole Remapping [Enabled]
DCT Unganged Mode [Always]
Power Down Enable [Disabled]
Page Smashing [Disabled]
Enable Bank Memory
Interleaving
Performance
Bank Interleaving
Bank Interleaving is an advanced chipset technique us ed to improve memo ry
perfo rmance. Memory interleaving increas es bandwidth by allowing s imultaneous
access to more than one piece of memory.
Options: Auto (Default)
Channel Interleaving
This item allows you to control the DDR2 dual-channel function.
Options: XOR of Address bits [20:16, 6] (Default) / XOR of Address bits
[20:16, 9] / Address bits 6 / Address bits 12 / Disabled
Enable Clock to All DIMMs
This item determines whether the BIOS should actively reduce EMI
(Electromagnetic Interference) and reduce power consumption by turning off
unoccupied or inactive DIMM s lots.
Options: Disabled (Default) / Enabled