Broadcast Electronics 3000 Series - VU Meter Amp 1 I Fi er; Delay Option

4-23. VU METER AMPLIFIER
The front panel VU meter (two in stereo models) display the
output level in playback
and input level in record. The input signal is
brought in from the Record Amplifier/Bias Board through calibration trimmer
R2 (R4) toP channel FET Q2 (04). The output signal is brought in from the
Playback/Logic
Board through calibration trimmer R1 (R3) toN channel FET
01 (Q3). These FET's are used to switch the input signal to the meter
amplifier.
Bias voltage (+12 VDC) is supplied to the FET's from the voltage
divider R30, R31 through R13 (R22), R15 (R23), R17 (R24). This keeps Q1
(Q3) in conduction and Q2 (Q4) shut off. Only the playback signal reaches
the meter
amplifier. When the record logic is in the record mode, a ground
is applied to the gates of the FET's through CR1 (CR6) to Q13. FET Q1 (Q3)
turns off and Q2 (Q4) turn on to connect the record signal and disconnect
the playback.
The output of the FET switching is direct coupled through R18
(R36) to the amplifier IC-1A (IC-1B). Capacitors C1 (C3) and C5 (C9) act
as blocking capacitors for the de bias on the FET's. Bias for IC-1A (IC-18)
is supplied from R17 (R24). After amplification, the signal is rectified
by bridge rectifier CR2 (CR10), CR3 (CR11), CR4 (CR12) .and CR5 (CR13) to
drive the
VU meter.
Transistor Q7 provides power supply decoupling and a controlled
turn on for the VU meter circuit. When ac power is first applied to the
unit the meter circuit is damped to prevent full scale deflection.
4-24. DELAY OPTION
The delay board contains the logic circuitry enabling the unit to
operate in the delay
mode. This board is located on the deck of the unit.
When the unit's logic is in the record mode, the cathode of diode
CR3 is grounded and the release bias is loaded through R5.
When the DELAY switch/indicator is depressed, +24 VDC is mo-
mentarily applied to the base of Q2 through R3, turning Q2 on and passing
current to ground through CR3. This action pulls the base of Q1 low.
Current through R1 and CR2 to the base of Q1 through R3 latches the logic
circuit in the delay mode. At the same time, Pin 5, which is connected
to one side of the DELAY indicator, also goes low and the DELAY indicator
illuminates. Relay K1 energizes since one side of the coil is tied to the
DELAY indicator. The bias current is routed through C2 to the erase head
through the normally open contacts of K1.
Release from the delay mode occurs when the unit is placed in
the
STOP mode (or not in the record mode) and the cathode of CR3 is no
longer tied to ground. This action causes the base of Q1 to go high,
turning the stage
off. This in turn turns Q2 off.
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