1
1
A A
PIN 2, 4
CNVi
CLOSE TO CONN.
PIN 2, 4
These TEST PAD put together in BOT side
NEW PART
Hybrid M.2 KEY-E 2230
WLAN
>40 mil
32KHz
BLUETOOTH
ᶵ⎗䓐 USB3 . 0 port妲嘇 㚫 忈 ㆸ BT Power Man ageme nt Issue.
USB 暨婳 BI OS姕 ⭂ 䁢XHCI
CNVi M.2 A+E KEY BT㍍US B 2.0 PORT
PCH-LP USB2.0 PORT-10
PCH-H USB2.0 PORT-14
>40 mil
PCIE TX AC CAP NEAR PCH
The Hybrid M.2 E-Key is used for:
1. CNVi RF(Jefferson Peak)
2. Discrete WiFi (PCIe v2.1 Gen1)
3. Discrete WiGig (PCIe v2.1 Gen2)
4. CNVi+WiGig combo(Cedar Peak)
5. Qualcomm WiGig/WLAN/BT
combo(Sparrow) on Cannon Lake, Coffee
Lake, and Gemini Lake platform.
L: CNVi
H: W/O CNVi
CLOSE TO PCH
CLOSE TO PCH
CLOSE TO PCH
WLAN/CNVi
AP2821KTR-G1
P/N = 6-02-02821-9C0
>120 mil>120 mil
CLOSE TO M.2
CLOSE TO M.2
PIN 72, 74 PIN 72, 74
20190528 update by common design
About REFCLK_0 38.4MHz TO PCH
CML U ES & WHL U need to connect REFCLK (38.4MHz)
CML U QS can not connect REFCLK (38.4MHz)
CML-U QS:*0_04
CML-U ES:0_04
WHL-U:0_04
CML-U:NC
WHL-U:71.5K_04
CLOSE TO M.2
CML-U:22Ω
WHL-U:33Ω
D02 add for BT RTD3
CNVI_BRI_RSP_R
CNVI_BRI_DT_R
CNVI_RGI_RSP_R
CNVI_RGI_DT_R
WLAN_PWR_EN
BT_EN
WLAN_EN
BUF_PLT_RST#
PCIE_TXN10_WLAN_R
PCIE_TXP10_WLAN_R
WLAN_EN_R
BT_EN
WLAN_EN
CNVI_DET#
WLAN_3.3V
CNVI_RGI_RSP_R
CNVI_RGI_RSP
CNVI_BRI_RSP
BT_EN
WLAN_EN
BUF_PLT_RST#
WLAN_3.3V
1.8VA
VDD3
WLAN_3.3V
1.8VA
VDD3 WLAN_3.3V
WLAN_3.3V
1.8VA
WLAN_3.3V
CNVI_WT_CLKP8
CNVI_WT_D0P8
CNVI_WT_CLKN8
CNVI_WT_D0N8
CNVI_WT_D1N8
CNVI_WT_D1P8
CNVI_BRI_RSP 6
CLKIN_XTAL_LCP 8
CNVI_RGI_RSP 6
CNVI_MFUART2_RXD 8
CNVI_GNSS_PA_BLANKING 8
CLK_PCIE_WLAN8
PCIE_RXP10_WLAN7
PCIE_RXN10_WLAN7
PCIE_TXN10_WLAN7
PCIE_TXP10_WLAN7
CLK_PCIE_WLAN#8
WLAN_EN 24
WLAN_CLKREQ2#8
EC_BT_EN 24
SUS_CLK 8
BUF_PLT_RST# 9,22,24,26,29
USB_PN107
USB_PP107
CNVI_RST# 6
CNVI_CLKREQ 6
CNVI_BRI_DT 6
CNVI_RGI_DT 6
CNVI_MFUART2_TXD 8
CNVI_DET#24
CNVI_WR_CLKP8
CNVI_WR_CLKN8
CNVI_WR_D0P8
CNVI_WR_D0N8
CNVI_WR_D1P8
CNVI_WR_D1N8
WLAN_WAKEUP#5
CNVI_WAKE# 9
CL_RST#1 5
CL_DATA1 5
CL_CLK 5
WLAN_PWR_EN24
1.8VA12,30,33
VDD35,6,8,9,12,21,22,23,24,26,29,30,31,32,33,35,37,38
PCH_BT_EN 2
Title
Size Document Number R e v
Date: Sheet
of
6-71-NL4C0-D02
D02
[25] WLAN ( B, E KEY )
A3
25 44Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NL4C0-D02
D02
[25] WLAN ( B, E KEY )
A3
25 44Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NL4C0-D02
D02
[25] WLAN ( B, E KEY )
A3
25 44Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
R11 *0_04
R24
71.5K_1%_04 FOR WHL
T3
C1
0.1u_6.3V_X5R_02
C354 0.1u_10V_X7R_04
R529 0_04
T4
R6 *33_04
R13 *33_04
C5
1u_6.3V_X5R_02
R18 22_04 CML=22Ω, WHL=6-14-3303B-11B
T1
C10
0.1u_6.3V_X5R_02
U3
UP7553PMA5-25
VIN
4
VIN
5
EN
3
VOUT
1
GND
2
R10 *0_04
R17 20K_04
R14 *0_04
E KEY
J_WLAN1
NASE0-S6701-TSH4
PCB Footprint = nxse0-s67xx-xx64x
P/N = 6-21-84300-075
HEIGHT = 3mm
SUSCLK(32Khz)(O)
50
CLKREQ0_N
53
GND12
69
REFCLKP0
47
REFCLKN0
49
PEWAKE0_N
55
WT_D0N
65
WT_D0P
67
WT_D1N
59
WT_D1P
61
GND11
63
GND6
33
GND13
75
3.3V2
72
UART_CTS/RGI_RSP
34
I2C CLK(O)
60
UART_TX/RGI_DT
32
USB_DN
5
USB_DP
3
I2C DATA(IO)
58
COEX1_TXD(I/O)1.8V
48
PERST0_N(O)
52
COEX3(I/O)1.8V
44
GND10
57
LED2_N(OD)
16
3.3V0
2
CLINK_RESET
38
GND1
1
LED1_N(OD)
6
WGR_D0P
17
W_DISABLE1_N(O)
56
3.3V1
4
GND2
7
GND4
18
CLINK_DATA
40
GND7
39
PETP0
35
PERP0
41
PERN0
43
PETN0
37
GND8
45
GND9
51
IRQ_N(I)
62
COEX2_RXD(I/O)1.8V
46
3.3V3
74
GND5
19
WGR_CLKN
21
WGR_CLKP
23
UART_WAKE_N
20
UART_RX/BRI_RSP
22
UART_RTS/BRI_DT
36
CLINK_CLK
42
W_DISABLE2_N(O)
54
REFCLK0
64
PERST1_N
66
CLKREQ1_N
68
PEWAKE1_N
70
WT_CLKN
71
WT_CLKP
73
PCM_OUT/CLKREQ0
14
PCM_IN
12
PCM_SYNC/LCP_RSTN
10
PCM_CLK
8
WGR_D0N
15
GND3
13
WGR_D1P
11
WGR_D1N
9
R15 22_04 CML=22Ω, WHL=6-14-3303B-11B
T2
R25
10K_04
R20 *20K_04
R12 *33_04
C15
22u_6.3V_X5R_06
R4 0_04
R5 100K_04
C353 0.1u_10V_X7R_04
R16 22_04
R22 22_04
R23 *20K_04
R528 *0_04
R7 0_04 FOR W HL
C2
22u_6.3V_X5R_06
R21 10K_04
R8 *10K_04
R19 *20K_04
R9 *10K_04
R27
75K_04
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