CMOSTEK CMT2300A-EQR - 2 Pin Descriptions

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Rev1.0a | 16/50
CMT2300A
2. Pin Descriptions
17
GND
SCLK
SDIO
CSB
FCSB
XI
XO
GPIO
2
GPIO
1
AVDD
PA
RFIN
RFIP
GPIO
3
DVDD
DGND
AGND
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
Figure 1. CMT2300A pin descriptions
Table 12. CMT2300A Pin Descriptions
Pin #
Name
I/O
Internal IO Schematic
Descriptions
1
RFIP
I
RF signal input P
2
RFIN
I
RF signal input N
3
PA
O
PA output
4
AVDD
IO
Analog VDD
5
AGND
IO
Analog GND
6
DGND
IO
Digital GND
7
DVDD
IO
Digital VDD
8
[1]
GPIO3
IO
GPIO3
din
pd_din
dout
pd_dout
Data tristate
pd_din default value is “1”
pd_dout default value is “0”
VDD
Configured as CLKO,
DOUT/DIN, INT2 and
DCLK (TX/RX)
9
SCLK
I
SCLK
din
Buffer
VDD
SPI clock