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Denon avr-s720w

Denon avr-s720w
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AD8195 (F-HDMI : IC811)
AD8195 Terminal Functions
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN
39 SDA_IN
38 CEC_IN
37 AVEE
36 VREF_IN
35 SCL_OUT
34 SDA_OUT
31 CEC_OUT
11ON0
12OP0
13VTTO
14ON1
15OP1
16AVCC
17ON2
20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3
18OP2
32 AMUXVCC
33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37,
Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN
39 SDA_IN
38 CEC_IN
37 AVEE
36 VREF_IN
35 SCL_OUT
34 SDA_OUT
31 CEC_OUT
11ON0
12OP0
13VTTO
14ON1
15OP1
16AVCC
17ON2
20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3
18OP2
32 AMUXVCC
33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37,
Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.
NJU72340AFH3 (DIGITAL_ANALOG : IC821)
NJU72340A Terminal Functions
Pin No. SYMBOL Pin No. SYMBOL Pin No. SYMBOL Pin No. SYMBOL
1 LOUT 14 DCAP_3 27 R4IN 40 GND
2 ROUT 15 REC_R 28 L4IN 41 LIN
3 COUT 16 REG_L 29 R5IN 42 RIN
4 LOUT 17 GND 30 L5IN 43 CIN
5 ROUT 18 RB2IN 31 RGIN 44 LSIN
6 LBOUT 19 LB2IN 32 LGIN 45 RSIN
7 RBOUT 20 RllN 33 R7IN 46 LBIN
8 SWOUT 21 LllN 34 L7IN 47 RBIN
9 DCAP_l 22 R2IN 35 DCAP_5 48 SWIN
10 DCAP_2 23 L2IN 36 MONOIN 49 V-
11 GND 24 R3IN 37 DCAP_G 50 V+
12 DATA 25 L3IN 38 ADC_R 51 DCAP_7
13 CLOCK 26 DCAP_4 39 ADC_L 52 DCAP_8
51
Caution in
servicing
Electrical Mechanical Repair Information Updating

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