Denon DRA-CX3 - Page 10

10
DRA-CX3
DA428440E-E (IC702)
BLOCK DIAGRAM
Control chip
44 FB2
Driver chip1
Driver chip2
VDD 22
AGND
1,9,12,21
VSS 2,11,20
IN1- 17
AGND1- 16
ENA 4
IN2+ 15
AGND2+ 14
TEST 19
DCG 7
THM 3
OCM 6
VDCK 10
Inverting
Non-inverting
VSCK 8
42 ZB2
23 FB1
25 ZB1
28 VD1
32 PWMFB1
33 SUB
41 PWMFB2
39 VS2
35 VDR2
37 VD2
High
drive
Low
drive
Current
d
etect
Current
detect
Reciever
DeadTime
Level
shift
High
drive
Low
drive
Current
detect
Current
detect
Reciever
DeadTime
Level
shift
COM/MECC
Control ch1
Comp
arator
COM/MECC
Control ch2
Comp
arator
Voltage
check
Thermal
Warning
Current Prot / HF Prot
Rec.
Soft
Limit
NTC
36 VD2
26 VDR1
31 PWM1
27 VD1
29 VS1
30 VS1
34 VS
40 PWM2
38 VS2
NC
13,18,24,43
Rec.
Soft
Limit
Current Prot / HF Prot
Shnchro
Circuit
SYN 5
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
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