Denon UD-M31 - IC302 and IC303 Component Details; LC75342 M Pin Assignment; LC72720 NM Block Diagram and Pinout

19
19UD-M31
LC75342M(IC302)
LC72720NM(IC303)
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CONTROL
CIRCUIT
LOGIC
CIRCUIT
CONTROL
CIRCUIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DI
CE
VSS
TEST
LOUT
LBASS2
LBASS1
LTRE
LIN
LSELO
L4
L3
L2
L1
NC
CL
VDD
VREF
NC
ROUT
RBASS2
RBASS1
RTRE
RIN
RSELO
R4
R3
R2
R1
NC
ROUT
RBASS2 RBASS1
RTRE RIN RSELO
212223242526
27
28
29
30
1
2
3
4
567
8
9
10
LSELO
L4
L3
L2
L1
NC
NC
R1
R2
R3
R420
19
18
17
16
15
14
13
12
11
LIN
LTRELOUT
TEST
Vss
CE
DI
CL
V
DD
Vref
NC
LBASS1
LBASS2
RVref
LVref
CCB
INTERFACE
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
Vref
MPXIN
Vdda
Vssa
FLOUT
CIN
T1
T2
T3 (RDCL)
T4 (RDDA)
T5 (RSFT)
XOUT
SYR
CE
DI
CL
DO
RDS-ID
SYNC
T7 (CORREC/ARI-ID/BEO)
T6 (ERROR/57K/BE1)
Vssd
Vddd
XIN
REFERENCE
VOLTAGE
ANTIALIASING
FILTER
57kHz
BPF
(SCF)
SMOOTHING
FILTER
PLL
(57kHz)
CLOCK
RECOVERY
(1167.5Hz)
RAM
(24 BLOCK DATA)
ERROR CORRECTION
(SOFT DECISION)
DATA
DECODER
SYNC/EC CONTROLLER
CCB
TEST
VREF
VREF
MEMORY CONTROL
OSC/DIVIDER
SYNC
DETECT-1
SYNC
DETECT-2
CLK(4.332MHz)
FLOUT
CIN
Vdda
Vssa
MPXIN
DO
CL
DI
CE
T1
T2
T3 T7
XIN XOUT
Vddd
Vssd
RDS-ID
SYNC
SYR