Digigram VX222e - Appendices; VX222 e Schematic Diagram; VX222 e-Mic Schematic Diagram

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APPENDICES
VX222e schematic diagram
PCI EXPRESS
BUS
AES/EBU IN
DAC
Level adjust
TRANSMIT
AES/EBU OUT
CLOCK
GENERATION
DSP
INTERFACE
GPIO
CONTROL
GP OUT
GP IN
RECEIVE
ADC
ANALOG
LINE IN 1 - 2
LINE OUT
Headphones OUT
LTC
CRYSTAL
VX222e-Mic schematic diagram
PCI EXPRESS
BUS
AES/EBU IN
AES42 compatible
DAC
Level adjust
TRANSMIT
AES/EBU OUT
CLOCK
GENERATION
DSP
INTERFACE
RECEIVE
ADC
ANALOG
LINE IN
1 – 2
SRC*
LTC
Bypass
AES/EBU
SYNC*
RECEIVE*
LINE OUT
Headphones
OUT
GPIO
CONTROL
GP OUT
GP IN
Level setting
48 V
MICRO IN
(mono)
LIMITER
CRYSTAL
*on request on VX222e