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Digilent Arty Z7 - MIO Pins and Peripherals

Digilent Arty Z7
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Arty Z7 Reference Manual Transfer Multisort Elektronik / tme.eu 8
There are many aspects of the Zynq APSoC architecture that are beyond the scope of this
document. For a complete and thorough description, refer to the Zynq Technical Reference
manual.
Table 2.1 depicts the external components connected to the MIO pins of the Arty Z7. The
Zynq Presets File found on the Arty Z7 Resource Center can be imported into EDK and
Vivado Designs to properly configure the PS to work with these peripherals.
MIO 500 3.3 V
Peripherals
Pin
ENET 0
USB 0
Shield
UART 0
0 (N/C)
1
2
3
4
5
6
7 (N/C)
8
9
Ethernet Reset
10
Ethernet Interrupt
11
USB Over
Current
12
Shield
Reset
13 (N/C)
14
UART Input
15
UART
Output
MIO 501
1.8V
Peripherals
Pin
ENET
0
USB 0
SDIO
0
16
TXCK
17
TXD0
18
TXD1
19
TXD2
20
TXD3
21
TXCTL
22
RXCK
23
RXD0
24
RXD1
25
RXD2

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