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Using BIOS
Chipset OverClocking Configuration
Scroll to this item to view the following screen:
Row Precharge Time (tRP) (8)
This item specifies Row precharge to Active or Auto-Refresh of the same bank.
CAS Latency (tCL) (8)
This item determines the operation of DDR SDRAM memory CAS (colulmn address
strobe). It is recommended that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.
RAS# to CAS# Delay (tRCD) (8)
This item specifies the RAS# to CAS# delay to Rd/Wr command to the same bank.
Row Refresh Cycle Time (tRFC) (86)
This item specifies the row refresh cycle time.
RAS# Active Time (tRAS) (20)
This item specifies the RAS# active time.
Write Recovery Time (tWR) (8)
This item specifies the write recovery time.
Active to Active Delay (tRRDmin) (4)
This item controls the ACTIVE bank x to ACTIVE bank y in memory clock cycles.
Read CAS# Precharge (tRTP) (5)
Write to Read Delay (twTR) (5)
This item specifies the write to read delay time.
This item controls the Read to PRECHARGE delay for memory devices, in memory
clock cycles.
Main Advanced Chipset M.I.B III Boot Security Exit
Memory Multiplier Configuration
Performance Memory Profiles Automatic
Memory Timing Configuration
CAS# Latency (tCL) 8
RAS# to CAS# Delay (tRCD) 8
Row Precharge Time (tRP) 8
RAS# Active Time ( tRAS) 20
Write Recovery Time (tWR) 8
Row Refresh Cycle Time (tRFC) 86
Active to Active Delay (tRRD) 4
Write to Read Delay (tWTR) 5
Read CAS# Precharge (tRTP) 5
Four Active Window Delay (tFAW) 20
The selection of Performance
Memory Profiles which im-
pacts memory sizing behav-
ior.
lk
+/- : Change Opt.
Enter/Dbl Click : Select
m
n
: Select Screen
/Click: Select Item
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC/Right Click: Exit
Performance Memory Profiles (Automatic)
This item enables you to set the Performance Memory Profile.
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