EVGA X299 Micro - PCI-E Slot Breakdown; M.2 and U.2 Slot Breakdown

EVGA X299 Micro (131-SX-E295)
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PCI-E Slot Breakdown
PCI-E Lane Distribution (44 Lane SKX CPUs)
 PE1 – x16 Physical (Gen3, x16 lanes from CPU)
 PE2 – x16 (Gen3, x16 lanes from CPU)
 PE3 – x16 (Gen3, x4 lanes from PCH)
PCI-E Lane Distribution (28 Lane SKX CPUs)
 PE1 – x16 (Gen3, x16 lanes from CPU)
 PE2 – x16 (Gen3, x8 lanes from CPU)
 PE3 – x16 (Gen3, x4 lanes from PCH)
PCI-E Lane Distribution (16 Lane KBX CPUs)
 PE1 – x16 (Gen3, x8 lanes from CPU)
 PE2 – x16 (Gen3, x8 lanes from CPU)
 PE3 – x16 (Gen3, x4 lanes from PCH)
M.2 and U.2 Slot Breakdown
PCI-E Lane Distribution
 U.2 – x4 PCH lanes
 M.2 Key-M (80mm) – x4 PCH lanes (Optane/PCI-E/NVMe/SATA)
 M.2 Key-E (32mm) – x1 PCH lane
• This motherboard does NOT have any lane replication via PLX; all lanes are
native and derived from CPU or PCH. This also allows for improved backwards
compatibility for Gen 2 devices.