FATEK FBs-4A2D - Page 76

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z When a single element or a serial block is connected in parallel with a parallel block, ANDLD instruction can be omitted if
put the parallel block in front.
X0
X2X1
X3 X4
Ö
X2
X0 X1
X3 X4
ORG X 0 ORG X 3
AND X 1 AND X 4
LD X 2 OR X 2
LD X 3 AND X 0
AND X 4 AND X 1
ORLD
ANDLD
z If the branch node of a branch circuit is directly connected to the output coil, this coil could be located on top of the branch
line (first row) to reduce the code.
Y0
Y1
X0
Ö
X0
Y0
Y1
OUT TR 0 OUT Y 1
AND X 0 AND X 0
OUT Y 0 OUT Y 0
LD
TR 0
OUT Y 1
z The diagram shown below indicates the TR relay and the ORLD instruction can be omitted.
X0
Y0
Y1
OUT TR0
X1 X2
X3
Ö
Y0
X0
Y1
X1 X2
X1 X3
ORG X 0 ORG X 1
LD X 1 AND X 2
OUT TR 0 OR X 0
AND X 2 OUT Y 0
ORLD ORG X 1
OUT Y 0 AND X 3
LD
TR 0 OUT Y 1
AND X 3
OUT Y 1