Advanced Function Instruction
7-2
FUN 23 P
DIV48
48-BIT DIVISION
FUN 23 P
DIV48
Sa：Starting register of dividend
Sb：Starting register of divisor
D : Starting register for storing the division
result (quotient)
Sa，Sb，can combine V, Z, P0~P9 for index
addressing.
HR OR SR ROR DR XR
Range
Ope-
rand
R0
∣
R3839
R3904
∣
R3967
R3968
∣
R4167
R5000
∣
R8071
D0
∣
D4095
V、Z
P0~P9
Sa ○ ○ ○ ○ ○ ○
Sb ○ ○ ○ ○ ○ ○
D ○ ○ ○* ○* ○ ○
z When operation control “EN”=1 or “EN↑” ( P instruction) changes from 0→1, will perform the 48 bits division
operation. Dividend and divisor are each formed by three consecutive registers starting by Sa and Sb
respectively. If the result is zero, ‘D=0’ output will be set to 1. If divisor is zero then the ‘ERR’ will be set to 1
and the resultant register will keep unchanged.
z All operands involved in this function are all 48 bits, so Sa, Sb and D are all comprised by 3 consecutive
registers.
Example: 48-bit division
In this example dividend formed by register R2, R1, R0 will be divided by divisor formed by register R5, R4, R3. The
quotient will store in R8, R7, and R6.
R
R
R
0
3
6
23P.DIV48
ERR
D=0
U/S
EN
X0
Sa :
Sb :
D :
R2 R1 R0
Sa
2147483647
R5 R4 R3
÷ Sb
1234567
R8 R7 R6
1739
Quotient
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