FATEK FBs-CB2 - Page 271

Advanced Function Instruction
7-107
FUN124 P
MINV
MATRIX INVERSE
FUN124 P
MINV
Ms : Starting register of source matrix
Md : Starting register of destination
L : Length of matrix (Ms and Md)
Ma, Md may combine with V, Z, P0~P9 to serve indirect
address application
WX WY WM WS TMR CTR HR IR OR SR ROR DR K XR
Range
Ope-
rand
WX0
∣
WX240
WY0
∣
WY240
WM0
∣
WM1896
WS0
∣
WS984
T0
∣
T255
C0
∣
C255
R0
∣
R3839
R3840
∣
R3903
R3904
∣
R3967
R3968
∣
R4167
R5000
∣
R8071
D0
∣
D4095
2
∣
256
V、Z
P0~P9
Ms ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○
Md ○ ○ ○ ○ ○ ○ ○ ○* ○* ○ ○
L ○ ○* ○ ○
z When operation control "EN" = 1 or "EN↑" ( P instruction) has a
transition from 0 to 1, source register Ms, which has a length of L,
will be completely inverted (all the bits with a value of 1 will change
to 0, and all those with a value of 0 will change to 1). The results
will then be stored into destination matrix Md.
L
MdMs
Ms
Inverse
X0
EN
Ma :
124P.MINV
L :
5
R 0
Md :
R 0
z In the program at left, when X0 goes from 0→1, the
matrix comprised by R0 to R4 will be inverted, and then
store back into itself (because in this example Ms and
Md are the same matrix). The results obtained are
shown at right in the diagram below.
Ms15
↓
Ms
Ms0
↓
Md15
↓
Md
Md0
↓
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 R1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
R2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 R2 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
R3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 R4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
↑
Ms79
↑
Ms64
↑
Md79
↑
Md64
Before execution After execution