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FIC AM35 - Page 40

FIC AM35
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AM35 Mainboard Manual
Video RAM Cacheable
When enabled, allows the video RAM area to be cacheable.
The options are: Enabled, Disabled.
System BIOS Cacheable
When enabled, allows the ROM area F000H-FFFFH to be cacheable when
cache controller is activated. The options are: Enabled, Disabled.
Memory Hole
When you install a Legacy ISA card, this feature allows you to select the
memory hole address range of the ISA cycle when the processor accesses
the selected address area. Please read your card manual for detail informa-
tion. When disabled, the memory hole at the (15-16MB) address will be
treated as a DRAM cycle when the processor accesses the15~16MB ad-
dress area. The options are: 15M - 16M, Disabled.
VGA Share Memory Size
It allows user to select the frame buffer size of VGA share memory.
The options are: Disabled, 8M, 16M, 32M, .
PCI Delay Transaction
Enable this feature to abort the current PCI master cycle and to accept the
new PCI master request, it reaccepts the original PCI master and returns
the PCI data phase to the original PCI master. The options are: Disabled,
Enabled.

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