Instruction Manual Supplement
D104215X012
DLC3100 SIS Digital Level Controller
April 2018
4
4. Safety Requirements
Average Probability of Failure on Demand (PFD
AVG
)
Table 1 shows the achievable Safety Integrity Level (SIL) in Low Demand Mode of operation, depending on the average
probability of failure.
Table 1. Achievable Safety Integrity Level (SIL) in Low Demand Mode
Safety Integrity Level (SIL) PFD
AVG
with Low Demand Mode
4 ≥ 10
-5
to < 10
-4
3 ≥ 10
-4
to < 10
-3
2 ≥ 10
-3
to < 10
-2
1 ≥ 10
-2
to < 10
-1
Safety Integrity of the hardware
Table 2 shows the achievable Safety Integrity Level (SIL) depending on the Safe Failure Fraction (SFF) and the Hardware
Fault Tolerance (HFT) for safety related Type-B subsystems.
Table 2. Achievable Safety Integrity Level depending on the Safe Failure Fraction and Hardware Fault Tolerance
Safe Failure Fraction
Hardware Fault Tolerance (HFT)
A hardware fault tolerance of N means that N+1 faults could cause a loss of the safety function
0 1 2
< 60% Not Permitted SIL 1 SIL 2
60% - < 90% SIL 1 SIL 2 SIL 3
90% - < 99% SIL 2 SIL 3 SIL 4
≥ 99% SIL 3 SIL 4 SIL 4
5. Safety Characteristics
The specified characteristics are applicable under the following assumptions that have been made during the FMEDA.
D The mean time to restoration after a device has failed is 24 hours.
D The architectural constraint type for the DLC3100 SIS digital level controller is Low Demand mode.
D The hardware fault tolerance of the device is 0 (HFT = 0).
D To avoid unwanted or unauthorized modification, the set parameters must be protected.
D Proof test interval: ≤ 1 year.
D Safety accuracy: 2% of full span.
D Only a single component failure will fail the entire DLC3100 SIS digital level controller.
D Failure rates are constant, wear out mechanism is not included.
D Propagation of failures is not relevant.
D All components that are not part of the safety function and cannot influence the safety function (feedback
immune) are excluded.
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