Fluke 8012A - Basic Block Diagram

THEORY OF
OPERATION
CIRCUIT
DESCRIPTIONS
opposite
polarity is
used to
discharge the
capacitor.
The
time
it
takes for
the
capacitor
to discharge
is
measured.
The
discharge
time is
proportional to the level
of the
unknown
input
voltage.
This
method
is extremely
accurate, fast,
and
noise-free.
3-13.
In the
following
description of dual
slope
integration,
assume
that
your instrument has a line
power
frequency
of
60
Hz and
a range
has been selected
which
causes the
±2V
measurement
range of the
Digital
Voltmeter to
be
activated.
Figure
3-2
contains
a
simplified
schematic of
the A/D
Converter
and a timing
diagram.
The circled
switches (in the simplified
schematic)
represent
FET
switches operated
by
the
digital
controller.
These
FET
switches, and the
three
operational
amplifiers,
are located inside
U3.
All other components
are
external
to
U3.
The timing diagram
shows
the
operation
of
the FET
switches
for one
conversion
cycle
with
unknown
voltage
inputs at
1
/
2 range, full range, and
overrange.
The conversion
cycle
repeats
continuously.
3-14. The
basic
clock frequency
is produced
by
dividing
the 3.84
MHz output from
the
quartz crystal by
64,
to
produce a
clock frequency of 60 kHz. The Timing
diagram
shown
in Figure
3-2
is
based on the
number of
clock
cycles counted and uses them as timing indicators.
The
conversion
cycle
is
20,000
cycles
long (or
1/3
of a
second for
the 60 Hz versions).
FUNCTION
SWITCHES
RANGE
SWITCHES
v/kn/s
CONDUCTANCE
CONDITIONER
RESISTANCE
CONDITIONER
VOLTAGE
CONDITIONER
LOW
CURRENT
CONDITIONER
DECilVIAL
POINT
A/D
CONVERTER
TRUE
RMS
CONVERTER
COMMON
INPUT
SIGNAL
CONDITIONERS
Figure
3-1.
Basic
Block Diagram
3-2