Trigger Level
Circuits
The trigger level
circuits generate the
trigger levels to the
A and B inputs. The
trigger
level
range
is
-5.1
V
to
+
5.1 V
with a resolution of
1.25
mV. As
the
input amplifier attenua-
tion is
approximately
about 2.4 times,
the trigger level
cir-
cuits generate a
DC level that
has
the
same attenuation.
This means that the output of this circuit has a range of-
2.2 V
to
+2.2
V with a resolution of 0.5
mV. To get the
high
resolution, two 12-bit DACs are used. The supply vol-
tages to the trigger
level circuits are filtered
to prevent noi-
se from the digital circuitry to influence the trigger level,
(see Figure
4-11).
The
trigger level circuits consists of:
-
Reference voltage circuit
(2.5
V),
(U86).
-
Reference
voltage inverter circuit (-2.5 V), (U59).
-
A
multiplexer
to select positive or negative
reference
voltage and Full
scale B
or Full
scale common B trim-
mers,
(U60).
-
Buffer circuits, (U61
and U62).
-
Two Digital to Analog converters, (U63 and U64).
-Two current-to-voltage converters (U65 and U66).
These
circuits
convert the current at the lOUT pins of the
DACs
to a voltage. This
signal
has a
range
of
approximately
-2.1
Vto 2.1 V.
-
Two
output buffers and RC filters for the trigger level
out-
puts on the rear
panel.
(U67).
Figure
4-11
Trigger
level
circuits.
Hardware Functional Description
4-9
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