Harman Kardon AVR 3550 - Page 32

LQFP QFP Pin Name Circuit Type Function
8082X0AOscillator pin
81 83 X1 A Oscillator pin
78 80 X0A A 32 kMHz Oscillator pin
77 79 X1A A 32 kMHz Oscillator pin
75 77 RSTX B Reset input pin
P00 to P07
General-purpose I/O ports
A pull-up resistor can be attached using the pull-up resistor setting
register (RDR0) (RD07 to RD00 = 1). (Invalid when set to output)
AD00 to
AD07
In the multiplex mode, the pins function as external address/data bus
lower I/O pins.
83 to 90 85 to 92
D00 to D07
C
(CMOS)
In the non-multiplex mode, they function as external data bus lower
output pins.
P10 to P17
General-purpose I/O ports
A pull-up resistor can be attached using the pull-up resistor setting
register (RDR1) (RD17 to RD10 = 1). (Invalid when set to output)
AD08 to
AD15
In the multiplex mode, the pins function as external address/data bus
upper I/O pins.
91 to 98
93 to
100
D08 to D15
C
(CMOS)
In the non-multiplex mode, they function as external data upper output
pins.
P20 to P23
General-purpose I/O ports
When the corresponding bit of the HACR register is 0, the pins function
as address upper output pins (A20 to A23).
A16 to A19
When the multiplex mode is enabled and the corresponding bit of the
HACR register is 1, the pins function as general-perpose I/O port.
99
100
1 and 2
1 to 4
A16 to A19
E
(CMOS/H)
In the non-multiplex mode, they function as external address upper
output pins.
P24 to P27
General-purpose I/O ports
When the corresponding bit of the HACR register is 0, the pins function
as address upper output pins (A20 to A23).
A20 to A23
When the multiplex mode is enabled and the corresponding bit of the
HACR register is 1, the pins function as general-perpose I/O port.
A20 to A23
In the non-multiplex mode, they function as external address upper
output pins.
3 to 6 5 to 8
PPG0 to 3
E
(CMOS/H)
The pins function as PPG timer output pin.