Harman Kardon AVR 3550 - Page 35

LQFP QFP Pin Name Circuit Type Function
P71 General-purpose I/O port
26 28
SOT0
F
(CMOS)
The pin functions as an UART data output pin.
P72 General-purpose I/O port
27 29
SCK0
G
(CMOS/H)
The pin functions as an UART clock I/O pin.
P73 General-purpose I/O port
28 30
TIN0
G
(CMOS/H)
The pin functions as the event input pin of the 16-bit reload timer.
P74 General-purpose I/O port
29 31
TOT0
F
(CMOS/H)
The pin functions as the output pin of the 16-bit reload timer.
P75 General-purpose I/O port
30 32
PWC2
G
(CMOS/H)
The pin functions as a PWC input pin.
P76 General-purpose I/O port
31
33
SCL
I
(NMOS/H)
The pin functions as the I
2
C interface data I/O pin.
While the I
2
C interface is operating, set the port output to Hi-Z.
P77 General-purpose I/O port
32 34
SDA
I
(NMOS/H)
The pin functions as the I
2
C interface clock I/O pin.
While the I
2
C interface is operating, set the port output to Hi-Z.
P80, P81 General-purpose I/O port
45
46
47
48
IRQ0, IRQ1
E
(CMOS/H)
The pins function as external interrupt input pins.
P82 to P87 General-purpose I/O port
50 to 55 52 to 57
IRQ2 to IRQ7
E
(CMOS/H)
The pins function as external interrupt input pins.
P90 General-purpose I/O port
SIN1 The pin functions as the simple serial I/O data input pin.56 58
CS0
E
(CMOS/H)
Chip select 0
P91 General-purpose I/O port
SOT1 The pin functions as the I/O clock I/O pins.57 59
CS1
D
(CMOS)
Chip Select 1
P92 General-purpose I/O port
SCK1 The pin functions as the SCI clock I/O pin.58 60
CS2
E
(CMOS/H)
Chip Select 2
P93 General-purpose I/O port
FRCK
The pin functions as the external clock input pin while the free-running
timer is in use.
ADTG
The pin functions as the external trigger input pin while the A/D
converter is in use.
59 61
CS3
E
(CMOS/H)
Chip Select 3
P94 General-purpose I/O port
60 62
PPG4
D
(CMOS/H)
The pin functions as a PPG timer output pin.
P95 General-purpose I/O port
61 63
PPG5
D
(CMOS)
The pin functions as a PPG timer output pin.
P96 General-purpose I/O port
62 64
IN0
E
(CMOS/H)
The pin is captured as the input capture ch0 trigger input pin.
P97 General-purpose I/O port
63 65
IN1
E
(CMOS/H)
The pin is captured as the input capture ch1 trigger input pin.
PA0 to PA3 General-purpose I/O port
64 to 67 66 to 69
OUT0 to OUT3
D
(CMOS)
The pins are captured as the output-compare event output pins.
33 35 AVCC - Pin for power supply to A/D converter
34 36 AVRH - Pin for external reference power supply to A/D converter
35 37 AVSS - Pin for power supply to A/D converter
47 to 49 49 to 51 MD0 to MD2
J
(CMOS/H)
Input pins for selecting operation mode
82 84 VCC3 - Pin for power supply 3.3 V
±
0.3 V (VCC3)
21 23 VCC5 - Amphibious pin for power supply 3.3 V
±
0.3 V/5.0 V
±
0.5 (VCC5)
9
40
79
11
42
81
VSS - Pins for input for power (GND)