Harman Studer D21m - Page 113

Date printed: 24.01.12
97
D21m System
6.8.3 AES/EBU I/O Cards ( and ) A949.0422, A949.0423, A949.0424
AES/EBU input/output card with 16 Ch I/O, available in 3 different versions:
A949.0422xx without SRCs (Sampling Rate Converters; Vista only)
A949.0423xx with input SRCs only
A949.0424xx with input and output SRCs (see adjacent picture).
Selectable output sampling rates: 96 kHz, 48 kHz, 44.1 kHz, or external
reference (22-108 kHz). Input SRCs can be bypassed individually. Output
SRCs can be bypassed in groups of four. Output dither is selectable for every
AES/EBU output from 24 bit, 20 bit, 18 bit or 16 bit. Settings are made with
jumpers. Inputs and outputs on standard 25-pin D-type connectors (female).
SRC Delay Enabled input and output SRCs each cause a delay (D) that depends on the
SRC’s input and output sampling rate (f
S_IN
and f
S_OUT
). Input and output delays
can be calculated using the formulas below.
[2] f
S_OUT
> f
S_IN
: D =
48
f
S_IN
[s]
[1] f
S_IN
> f
S_OUT
: D =
16
f
S_IN
+ [s]
32
f
S_OUT
Examples:
 • Fora96kHzinputsignalanda48kHzsystemclock(i.e.,the‘outputsignal’
of the input SRC), input delay is 40 output samples or 0.833 ms (formula [1]).
 • Fora48kHzsystemclock(i.e.,the‘inputsignal’oftheoutputSRC)anda
96 kHz output signal, output delay is 96 output samples or 1 ms (formula [2]).
Note If the core is operating with a 44.1 or 88.2 kHz system clock, the output
sampling rate will be 44.1 or 88.2 kHz, regardless of the jumper selection,
unless the external sync input is used and Ext. is selected. In such a case the
output sampling rate corresponds to the one of the external sync signal.
Backplane Connector
Clock Selector 1 *
96 k, 48 k, 44.1 k, ext.
* for A949.0424xx only ** for A949.0423xx and A949.0424xx only
Clock Selector 2 *
96 k, 48 k, 44.1 k, ext.
AES Tx
AES Tx
AES Tx
AES Tx
AES Tx
AES Tx
AES Tx
AES Rx *
AES Tx
AES Rx
AES Rx
AES Rx
AES Rx
AES Rx
AES Rx
AES Rx
AES Rx
AES Out 1
AES Out 2
AES Out 3
AES Out 4
AES Out 6
AES Sync In *
AES Out 8
AES Out 7
AES Out 5
AES In 1
AES In 6
AES In 3
AES In 5
AES In 4
AES In 2
AES In 7
AES In 8
SRC *
SRC **
SRC *
SRC *
SRC *
SRC *
SRC *
SRC *
SRC *
SRC **
SRC **
SRC **
SRC **
SRC **
SRC **
SRC **