1C724 and
IC730
control
the counter
modes as
a
func-
tion
of
short
form,
auto carry,
and
vertical
retrace
signal.
Pictorial
4-11 shows
a
summary
of the
counter
controls.
COUNTER CONTROLS
During
Scan
+20
+
+4
+12
is: counted up by
the
character
generator
board.
During
Retrace
Long Form
+20+ +4
+4
+
+12
if
auto carry button
is
depressed.
Short
Form
+20
+
+12
if
auto
carry
button
is
depressed
+12+
+4
pin
7)
so
that the
Terminal is
in
the scrolling mode.
Next, it checks to see if there was a
+l-2
or
+4
count
up, which occurs if the cursor changes from
one
line
or column to another. The Timing Diagrams
show
that the cursor count-ups
occur only on TPU
cycle
1C.
IC735A, B,
and
D
decode the
C.U.
+4
(5707
pin
9) and
the
C.U.
+72
(57o7
pin
2)
as functions
of the short
form signal
(S704
pin
10). The output
(IC735D
pin
13)
is applied to the D input
(pin
2) of flip-flop IC709A. If
either one
(C.U.
++
oi
C.U.
+72)
islow
(0)
during mf
cycle 1C
(1C
is the
clock
input
to the flip-flop),
the
Q
output
(pin
6)
goes
high
(r).
Next, the TPU
checks to see if the cursor
address
is
coincident
with
the scroll or start
of
page
information.
The
+'1.2
and
+4
scroll coincidence signals
come
from the RAM
and counter
circuit
board
(5702
pin
and SZOS
pin
11 respectively).
IC710D and IC733A
decode the coincidence
signals as a
function
of
short
form
and apply the
output to the D
input
(pin
12)
of
flip-flop IC709B. The
scroll coincidence information
comes
from
the RAM and counter
circuit board dur-
ing TPU cycle 2C. If
there is scroll coincidence, TPU
pulse
2C
clocks a logic 0 into flip-flop IC7098,
and the
Q
output
fpin
8) of the flip-flop
goes
high.
When all three conditions have been met, the TPU
knows
that the cursor was counted away from
the last
column
or
the last row
on the screen and a
scroll
operation should be
performed.
The
outputs of flip-flops IC709A
and B are ANDed in
IC7158.
The
output of
IC7158
drives
one
input
(pin
5)
of
NAND
gate
IC741B. The
other input
(pin
4) is
driven from
the
Q
output
fpin
8) of flip-flop IC733C
and D,
which is normally reset
(Q
:
1). If the
Scroll
key is
pushed
in
(5704
pin
Z
:
logic
0), the output
(pin
6) oflCT 418
goes
low
to
indicate
to the
rest
of the
TPU
that a scroll
operation should occur. Ifthe Scroll
key is up
(released),
the
output
(pin
3)
of
IC739A
goes
low
and sets flip-flop IC733C
and D
(O
=
1). This
holds the input
(pin
4) to
lC741B
low,
which
keeps
the output
(pin
6) of
lC741B
from
going
low
to
indi-
cate that the
scroll
operation should take
place.
This
is the
"hold
screen" mode. IC733 stays
preset
until
the
Scroll
key
is
pushed
in. The
Q-outputs
of
IC709A
and
B
also stay high for
the duration. They
are
nor-
mally
preset (Q
=
0J
by TPU
pulse
7C
that is applied
through
IC739C.
However,
during the
hold screen
mode, the
Q
output
(pin
8) of
IC733C
inhibits IC739
(and
the 7C
pulse).
Therefore,
since one input
(pin
a)
of IC7158 is high,
the
output
(pin
6) stays high. The
Q
output
(h-ofd
s- sffeen)
of
IC733C is
also sent to the I/O
circuit board
(5702
pin
10)
to
inhibit
external data
inputs.
+20
+
+4
+20
+
+12
+4
+
+12
+12
+
+4
Scan
+
Long Form
Retrace.
Short
Form
.
Auto Carry
Retrace. Long Form. Auto carry
Retrace
.
Short Form
PICTORIAL 4.II
SCROLLING
When
the screen
(RAM)
has been
filled with charac-
ters, the cursor
can
return to
the
start of
RAM location
(home)
and
write new
characters
over
the
old
ones, or
the
screen
can be cleaned up and
rearranged
with a
scrolling operation.
This
consists of
erasing
a row
or
block
of characters
and
juggling
RAM
addresses so
that the
empty
row
appears at
the bottom of
the screen
or
the
empty
column appears at
the right of the screen.
Data
is
not
actually moved around
within the RAM.
The
screen
refresh starts at a different
RAM location
to
give
the appearance on the screen
that the
data has
moved
around.
To determine whether
a
scrolling
operation
should
occur,
the
TPU checks for three conditions.
First of
all, the Scroll
key must be
pushed in
{logic
0 at 5704
To Next Page
Loading...