Heathkit H9 - Special Cursor Movements; Refresh Interrupt and Transmit Page

ponding
input
of
IC727
goes
to
a logic
1. Then
the
next
1C
pulse
from
the TPU,
which
drives
inputs
2,
4,
10,
and 1.2
of 1C727,
causes
the
proper
output
(S,
6,
g,
or 11)
to
go
low
(logic
0). This
counts
up
the
proper
RAM
counter.
A
+2O
count up
(5706-5)
moves
the
cursor
to
the
right,
a
count down
(S706-6)
moves it
to the
left.
A
+1.2
count up
(5707-2)
moves
the cursor
down
the
screen
and
a
+12
count
down
(5706-12)
moves
the
cursor
up
the
screen. TPU
cycle
3
(5702-3)
resets
all
four
cursor
movement
latches
on the
kevboard
circuit
board.
Pressing
the
cursor
Home
key
(SZ0
-3)
latches
the
scroll
information,
that
was
loaded
into
the
RAM
counters
during TPU
cycle 7,
into
the
cursor latches
on the RAM
and counter
circuit
board.
The
cursor
latches
are
actually
latched
by the
trailing
edge
of
TPU
cycle 7C.
The
cursor home
signal
(a
logic
0) from
the
keyboard
circuit board
drives input
pin
13
of
ROM
IC728.
This
causes
a logic
1 output
from pin
g
(cursor
latch
ena-
ble,
5706-1)
during
TPU
cycle
ZC.
Refer
to Timing
Diagram
#4.
Since the
scroll
information
is also
the
start
of
page
information,
the
cursor will
automatically
appear
in
the
upper left
hand
corner
of the
screen.
Refer
to
Timing
Diagram
#4 for
the
cursor timins
relation,
ships.
Gates IC716A (NAND)and
IC715C
(AND)
control
the
+L2
count up
signals
coming from
the
character
generator
circuit
board
(5705-5).
During
scan and
at
the
end
of each characterrow,
the D
output
(57
07
-2)
of
the scan row
counter counts
up the
+12
counter
4,C775
pin
8).
However,
when
the
vertical
blanking
signal appears
(Vn'
from
IC705D pin
13)the
count
up
is defeated (when
the
pin
2
input
to
IC71OA
is
logic 0)
for
the duration
of the
vertical
retrace
time.
The
count
up is
also defeated
when
the
Terminal
is in
the
plot
mode
and the first
character
line is
the
only one that is
displayed. IC722D
and
lC722C
control
the
RAM
count up
signal
(C.U.
+20,
S7O5-7)
coming
from
the
character
generator.
During
scan the
+20
counter is
counted up by
the output
(pin
11
of
lC7zzD),but
it is
inhibited
when the
vertical
blanking
signal
appears
[Vn'
at
pin
1.2
of
IC722D).
During
the
erase cycle the
+20
counter is
counted up by
the output
fpin
8)
of
lC722C
as
long
as the
output
fpin
a)
of
lC737B is
high
(refer
to the
section
on
scrolling
and erasing).IC7228
controls *ls
+20
count
up for
write
operations.
The
+20
counter
can
be inhibited
by
the
+20
count up
defeat signal coming
from the special character
latch
(lC72O
pin
2 and IC708D
pin
13)
or
by the end of
line
and
no
auto
carry
signals
(EOL.AC)
coming
from
IC730
pin
6.
WRITING
DATA/DATA FLOW
Data is manipulated
within the Terminal
primarily
by
logic array
lC702, as a function of
where data is com-
ing from, where it
is
going,
the mode
the Terminal is
in, the TPU timing
pulses,
and whether
or not the
external
devices are ready to accept data.
Data flows
on
the bus according to the two
diagrams
in
Pictorial4-14.
All
of the devices
are tied directlv to
KEYBOARD
o
L
F
=
X
DATA
FLOW
FULL DUPLEX
&
F
=
X
DATA FLOW
HALF DUPLEX
PICTORIAE
4.74