HP 1630G

RS-232C/V .24
and RS-449
The HP 1630A/D/G and
HP 1631A/D
logic analyzers have trace
resource terms
that allow you to trigger
on a precise
sequence of data
within the serial stream .
For
example, a logic analyzer with the
HP
10342B can be set up to find
specific
patterns
in the data stream . Here,
the logic
analyzer is scanning the data
stream for an
"L,"
which is defined as the term
"a"
(figure 1) . When it is found, the
analyzer
stores it-, and looks to see whether
the next
term
is "O" or "b ." If it finds
"b" next to
"a,"
it stores both terms and
proceeds to
look
for "c ." If it does not find
"b" next
to "a," the
analyzer looks for a second
"a ;"
stores
it, and then looks to see
whether a
"b"
follows it . This process
continues until
a "b"
is found that follows an
"a ." This
ensures
that the exact sequence
is located .
The analyzer then finds "c,"
stores it, and
begins
its trace upon finding
"d ."
After the trace
is complete, the
analyzer
presents the data in an
easy-to-read
inverse-assembled
format .
There is no need to
interpret symbols
(figure 2) . The analyzer
displays "a," "b,"
"c," and "d" followed
by the rest of the
serial stream .
You can easily identify
transmissions,
receptions, their respective
input pin numbers,
and the data .
To locate
bottlenecks, the HP 1630G
displays the
relative time between states .
Rewriting
a particular section of code
can
greatly
reduce transmission time .
HP-IB
The
HP 10342B simplifies
monitoring
and locating HP-113
problems . The
HP logic analyzer's trace
capability
allows you to trigger on a
specific address,
data, or control function .
HP-IB is based on
a three-wire
handshake process for
transferring data .
The handshake
process can be viewed
with the timing
analyzer to ensure
proper sequencing . The
display shows
that the sequence
occurred properly but
that there is
a glitch on the
not-ready-for-data
(NRFD) line . The
HP 1631A/D's
200 megasample/second
digitizing
oscilloscope capabilities
can be
used to
display the glitch with
up to
5-ns
resolution (figure
3) .
State Llsting ___- -----------------
------------------- __------
L

41Y
ab :U

TX RX

PIN BATH . HER ITS CIS OTR
DSR . CD

TL~e
Base ,

l
Figure 1 - The logic analyzer scans the
data
stream looking far the
transmitted character
sequence LOKB . When the
exact sequence is found,
the logic analyzer fills its
memory with the next
1021 states .
Figure 3 - Glitches, which can cause the
bus to
lock-up, are detected with the HP
1631A/D's
timing analyzer, and
are digitized up to 200
megasamples/second with
its analog capability .
The mixed
display mode allows simultaneous
viewing of
timing and analog .
State histograms can be
used to
ensure that bus transfers
are optimized
(figure
4) . Here, we can see that 25% of
the
time involved the transfer of data,
indicating inefficient use of the bus .
Timing
analysis and histograms can also
be performed on RS-232C/V .24
and
R
S449 .
Figure
2 - The sequence LOKB was
found .
Transmitted and
received data, and control
functions
are displayed along with their
respective
input pin
numbers . The HP 1630G also shows
the
actual
elapsed time between states . Note
the bus
turn-around time when changing from
transmit to
receive .
Figure 4 - Bus
performance can be evaluated with
histogramming .
The display shows that only 25%
of the
bus activity involved data transfer .
Rewriting
code could improve bus efficiency .
-ee03
.
IN 123
L 4G RTiCTS
DSR
0 .00 .
- 0902 " TX E23
0 4F RTSCTS DSR 8
.334
-0001 " TX 121
K 4B RTS
CIS
DSR 0.332 as
+0900 " T% C21 6 42
RTS
C75
DSR B.33a .5 .
" 0991 "
IT
121 9: IT
S
CTS
OSR 8,,339 ms
+0002 " T%, f21 HS ITS l T5 DSR
4 .332 me
" 01303 " TX 121
FF CTS OSR .Ca 8
.340 ms
,u* .u '/--x TX 121
FF T CTS DSR CO '0 .33]
ms
.seas
2 .aoa6 Ix
131 FF
CIS
DTRDSR
CV 0 .167 ."
131 FF IS
DT R 05R CD . . 35 .97 ms
" 0007 BX 131
FF CTS DTRDSR CD ,
9 .115 m
" 0000 RX 131 : .
FF C T5 DTRDSR CD 9 .167
m
" 0009 RX 131 96
CIS .OTR DSR CD 91159 my
+0010 RX 131
96 ITS OTR OSR CO
4 .166 ms
" 0011 RX 131
96 CT5 3TR DSR CO 9
.116' ms
" 0012
RX 131 96
CISITR DSR CO 9 .166 ms .