HP 3457A - 8-29. Output FET Gate Bias Amplifier; 8-30. Offset Compensation Switching (OCOMP command)

In
the
DC
volts,
DC
current
and
2-wire
ohms
functions,
the
zero
measurement
is
made
with
UI0!
switch
MC
(measure
customer)
open
and
UI01
switches
MZ
(measure
zero)
and
7
closed.
Switches
MZ
and 7
connect
the
Input
Amplifier
to ground
through
a
102K
ohm
resistor.
After
the zero
measurement
is made,
switches
MZ
and
7
open
and
switch MC
closes
for
the
input
measurement.
In
the
4-wire
ohms
function,
the
zero
measurement
is
made
with
U101
switches
MC
and
7
open
and
UIOL switches
MZ
and
7
closed. The
input
amplifier
is
connected
to ground
through
the ohms
low
sense
path
(K102
pins
4-5
and
J104)
via
an
externally
connected
lead
to
the
LO
INPUT
terminal
(J102
and
K101) which
connects
to
ground.
This
measurement
is different
than the
DC
volts,
DC
current
and
2-wire
ohms functions
because
the input
amplifier
is
connected
to
ground
through
the
externally
con-
nected
low
ohms
sense and Jo input
leads.
This
can
cause
a problem
when
scanning
channels
and
using
the
measure
command
because its
possible the
sense and
lo input
leads
can
get separated.
When
this
oc
curs,
the
resistance
reading
will
be unstable.
After
the
offset
measurement
is
made,
switches
MC
and
7
close
and
switches
MZ
and
7
open. The
7
switch
closes
to
shunt
any
possible
voltage on
the
junction
of
switch 7
to
ground.
8-23. Offset DAC
The offset DAC section (U217, U122, U1L23 and U218) is used by both the A2 and A3 assemblies. The
DAC
provides
a
bipolar
+10V
output
in
1024
steps
of
approximately
2mV
step
size.
A
code
of
0
programmed
to
the
DAC
yields
an
output
voltage
at
JM102
of
-10
volts
while
a
code
of
S12
gives
0
volts and 1023 provides a full range output of +10 volts.
The
DAC
bits
are
written
by
MPU
USOI
(schematic
A2/2)
into
the
16
bit
serial
shift
register
U122,
123
via
line SDO.
The
10
least
significant
bits
of
the
register
are
connected
to
DAC
U217.
The
DAC
provides
a
current
output
at
pin
|
which
is
scaled
to
a
voltage
of
0
to
-10
volts
by
U218b
using
the
gain
matched
resistors
in
U217.
The
DAC
output
is
referenced
to
the
buffered
+10
volt
reference
at
U5SI7a
pin
7.
Level
shifting
circuit
U218a
multiplies
the
output
of
the
DAC
from
0
to
-10
volts
to
0
to
+20
volts
and
then
shifts
the
output
down
by
-10
volts
to
get
a
final
output
range
of
-10
to
+10
volts
at
JM102.
Shift register U123 also provides miscellaneous control bits to the DCI switch U403 and AC ACAI
source U402. The HTSO bit is the actual step used as the flatness ACAL source.
8-24, Pre-charge Stage and Pre-charge Offset Adjust
Pre-charge Stage
The pre-charge amplifier in UI0I is used to pre-charge the stray capacitance at the input node of the
input amplifier section. During a zero measurement, when Autozero is On, the input to the input
amplifier is continuously switched between the input terminal through U101 switch MC and the analog
ground
through
UI01
switch
MZ.
The
parasitic
capacitance
(approximately
10pf)
at
the
amplifier
in
put has to be charged and discharged. The charging current would come through switches MC and MZ
if
the
pre-charge
circuit
were
not
present.
This
could
load
the
input
voltage
and
cause
reading
errors.
To prevent this, the input of the input amplifier is pre-charged to the input voltage before the input
measurement
is
made.
This
is
done
by
the
pre-charge
amplifier
and
MOSFET
switch
PRE
which
are
both located within U101. The operation is as follows:
A, After the zero measurement is made, switch PRE closes (switch MC is still open).
B. The input voltage is connected to the pre-charge amplifier using the input paths.
C. Since the pre-charge amplifier is a X1 gain amplifier, a voltage with the same polarity and value
as the input voltage is applied through PRE to the input amplifier. This pre-charges the stray
capacitance to the input voltage.
HP 3457A Multimeter
8-9