HP 3457A - Page 176

D. Switch PRE then opens and MC closes and an input measurement is made.
Pre-charge Offset Adjust
As previously stated, the pre-charge amplifier is used to pre-charge the input amplifier. However, the
pre-charge amplifier itself also requires offset adjustment due to its offset voltage. Without it, the in-
put through UIOL switch MC would still need to provide a small amount of charging current for the
input amplifier node stray capacitance. To further improve the instrument accuracy, the offset voltage
of the pre-charge amplifier is greatly reduced by the Pre-charge Offset Adj circuitry, U216. The com-
bination of U216, R216 and R217 form a voltage-to-current converter circuit. This circuit translates
the 0 +10 volt DAC output at JM102 toa 0 +20uA current output at U216 pins 3 and 15, This current
is used to reduce the input offset of the pre-charge amplifier in ULO1. The output impedance of the
pre-charge amplifier in Ul0I is about 20K ohms so luA of current sourced from this unity gain
amplifier reflects to its input as an offset of -20mV. This is used to null out the undesirable input of f-
set voltage.
During an auto calibration procedure called OHMS PRE-CHARGE ACAL, UI10I's pre-charge amplifier
offset voltage is calibrated to near zero. This is accomplished through an iterative measurement on the
300 Volt DC range with the input terminals open and K107 open. Two measurements are made using
the | PLC mode, one measurement is made on the path through U101 switch MC and the other is made
on the path through U101] switch PRE. After the two measurements are made, a correction value is
computed and output. This procedure is repeated until a computed change of less than one DAC count
is generated.
8-25. Input Amplifier
The purpose of the Input Amplifier, in conjunction with the Input Switching Circuitry, is to condition
the input signals. The conditioning is done to apply the same full scale 10V DC voltage to the A/D
Converter for all full scale inputs. The input amplifier must accomplish this task while at the same
time introducing little or no error to the input signal
The Input Amplifier is simply an op-amp whose gain is selected through MOSFET switches 8, 9 and 10
in ULOL. These switches select gains of 3.33, 33.3 and 333. Since the essential characteristics of a preci-
sion amplifier are not available in standard op-amps, discrete components must be used. The Input
Amplifier section could be broken into three main blocks, Input Stage Bias, Input Gain Stage and
Output Gain Stage. These are discussed below.
Input Stage Bias
The input gain stage (QI11, QI12) is designed to require a bias current of 400UA for proper operation.
The circuitry composed of QII4, UI12a, Ul12b and their associated 4 resistors comprise a precision
current source to achieve this need. U112b generates a stable -12 volts and -10 volts used by U112a to
force
a
2
volt
difference
across
R114,
This
forces
a
current
of
approximately
400uA
(2V/5110
ohms)
to flow from the emitter and into the collector of output transistor Q114.
Input Gain Stage
The input gain stage is designed to have exceptional gain linearity and common mode rejection to
reduce measurement errors. The input FET, QII1, is the main element of this stage. Its characteristics
determine the input current and input noise parameters of the amplifier. Cascode device QII2 is
present to improve the CMRR properties of the first stage QII 1.
The combination of QII3, Ullla, RII and R112 provide the net effect of a very large load resistor at
the drain of Q112, pin 5. The effective resistance generated produces a gain ( >300 ) much larger than
HP 3457A Multimeter
8-10