HP 3457A - 8-34. Voltage Reference; 8-35. A;D Controller; 8-36. A;D Control

FET switch Q515 is present to short out the noise of the Analog Auto-Zero Loop and also the correc-
tion voltage, during the run-up interval. Since the primary purpose of the Analog Auto-Zero Loop is to
define a precise zero for the run-down interval, shorting Analog Auto-Zero during run-up will have
minimal error effect.
8-34. Voltage Reference
To maintain long term accuracy of a DVM, a precision Voltage Reference is required. This instrument
uses a pretested voltage reference assembly with superior stability. The reference assembly plugs onto
the A2 assembly. In conjunction with the reference assembly, reference gain resistors inside the A/D
hybrid (U511) are used to generate the primary -10 volt instrument reference voltage. Amplifier L516
along with other resistors in U511 provide a precision inverter for generation of the +10 volt reference.
Buffer transistor Q522 is used to provide a low output impedance for the -10 volt reference over a
wide frequency range. Bias resistor R532 aids in this by supplying a continuous bias of 2mA from
Q522.
8-35. A/D Controller
The following discussion refers to the A/D Controller circuitry which is located on schematic A2/2
The A/D Controller can be divided and is explained as follows:
A/D Control
Frequency Counter
Floating Common Microprocessor
Cross-Isolation Link
8-36. A/D Control .
The A/D input signal is integrated during the run-up phase of the conversion cycle and the multi-slope
conversion technique actually starts accumulating the most significant digits of the reading during run
up. For the run-up interval, the microprocessor has control of the slope decisions on a real time basis
and the slopes are finite increments of time (6uS of St4 and luS of S+0). The microprocessor accumu-
lates the total number of each slope type used. For slopes in run-down, slope control is performed by
external logic. This logic removes some slope decisions from the microprocessor; therefore, measure-
ment throughput is increased. The run-down phase of the conversion cycle is discussed below.
During run-down the initial slope (St4) is decided by the microprocessor and output to the A/D hybrid
USILI, pins 7-9 through the slope control bits at U501, pins 3-5. Gates U508a, 508b, and 508d along with
US07a and US02d form a feedback circuit which turns off slopes immediately following a run-down
zero crossing as detected by the comparator output at USI1, pin 11. This hardware is necessary to keep
slope overshoot time, the time from zero crossing detection to slope turn off, to a minimum. Due to
noise, it is possible for the slope shut off system (U502/U507) to oscillate once when the comparator
goes through zero on the final slope. To prevent this, U508¢ latches the comparator transition selected
by USO7a.
The final aspect of run-down is the actual measurement of the slope times. A 20 bit counter is used to
accumulate time intervals of the run-down slope. This counting is performed by the MPU internal
counter (U501, pin 14) prescaled by a 4 bit counter U506.
Time interval measurements must be made with extreme precision and repeatability to achieve the
necessary accuracy. This requires low phase noise from the clock oscillator. The clock output ALE
(U501, pin 30) must be re-clocked by U503a to provide a phase stable, repeatable clock to the A/D
hybrid (U5S11) and the external time interval counter (U506). U506 counts this phase stable 2MHz when
HP 3457A Multimeter
8-16