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HP 3457A - Page 187

HP 3457A
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©
Sets
address
lines
Al4
high
and
A1I5
low
to
enable
decoder
U513.
The
low
portion
of
timing
signal
E+d
(U597b,
pin
4)
activates
the
NVRAM
output
of
decoder
U513.
The
NVRAM
signal,
applied
to
the
emitter
of
Q501,
causes
a
negative
pulse
at
the
collector
(NVCS)
to
enable
RAM
USII.
The
output
of
gate
U595d
is
pulsed
low
by
the
positive
portion
of
the
@
timing
signal
(U501,
pin
35)
and
the
inverted
R/W
signal
from
inverter
U599e.
This
causes
the
output
of
US91a
(nvwr)
to
go
high,
During
this
time,
the
low
NVE
signal
ensures
a
low
output
from
gate
U596a.
The
nvwr
signal
is
applied
to
the
base
of
Q500
through
gate
U594b,
causing
it
to
conduct.
The
low
output
of
Q500
(NVWE)
activates
the
input
of
RAM
US511.
The
microprocessor
then
writes
the
information
to
USII
through
data
bus
"A",
lines
DO
through
D7.
After
completing
the
write
to
CAL-RAM,
the
microprocessor
toggles
the
TNOP
signal
at
US10,
pin
19.
The
positive
TNOP
pulse
is
applied
to
gate
U59Ic.
The
negative
pulse
from
the
output
of
US9I¢
presets
J-K
flip-flop
U592b,
setting
its
0
output
low.
The
low
@
output
from
U592b
clears
J-K
flip-flop
U592:
setting
its
9
output
high
to
remove
the
RAM
write
enable
signal
(NVE)
and
"lock"
the
circuit.
The
TNoP
signal
also
resets
counters
U514
and
U515.
The
CAL-RAM
Lock
operation
and
CAL-RAM
Write
operation
is
performed
a
total
of
five
times
for
each
calibration
command.
The
Calibration
Reset
operation;
however,
is
performed
only
once.
8-48.
Reset
Circuit
Operation
The
purpose
of
the
reset
circuit
is
to
set
the
microprocessor
to
a
known
state.
The
reset
circuit
is
active
under
the
following
conditions:
©
At
"power-on",
©
When
the
+5
volt
power
supply
is
low.
©
If
the
microprocessor
goes
to
a
non-operational
state.
©
At
the
beginning
of
a
calibration
or
auto
calibration
routine.
Power-on
Reset.
The
power-on
reset
circuit
consists
of
comparators
U519b
and
U519d,
buffer
U594d
and
battery
BTSOL.
The
minus
input
of
comparator
U519b
is
referenced
to
+3
volts
by
battery
BT501.
The
plus
input
of
US519b
is
connected
through
a
voltage
divider
to
the
+5
volt
un-regulated
power
supply.
At
initial
power-on,
the
plus
input
to
U519b
is
less
than
the
+3
volt
reference
on
the
minus
input
and
the
output
is
held low.
The
low
output
of
U5I9b
is
applied
to
the
plus
input
of
U519d,
holding
its
output
low.
The
low
output
of
U519d
is
coupled
through
buffer
U594d
to
the
RESET
input
of
the
microprocessor.
As
the
power
supply
reaches
operating
voltage,
the
voltage
at
the
plus
input
of
U519b
exceeds
the
reference
voltage
at
the
minus
input
and
the
output
goes
positive.
The
positive
output
of
USI9b
ap-
plied
to
the
plus
input
of
comparator
U519d
causes
its
output
to
go
high.
The
high
output
of
US19d
is
coupled
through
buffer
U594d
to
the
RESET
input
of
the
microprocessor
to
release
it
from
the
R
At
state.
Low
Power
Reset.
If
the
un-regulated
+5
volt
power
supply
should
drop
below
approximately
+7
volts,
the
plus
input
of
comparator
U519b
drops
below
the
+3
volt
reference
at
the
minus
input
causing
the
output
to
go
low.
The
low
output
of
U519b
is
applied
to
the
plus
input
of
U519d
causing
its
out-
put
to
go
low.
The
low
output
of
U519d
is
coupled
through
buffer
U594d
to
the
RESET
input
of
the
microprocessor.
The
processor
is
held
in
a
RESET
condition
until
the
un-regulated
+5
volt
supply
returns
to
normal.
HP
3457A
Multimeter
8-22

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