IBM Power7 - Page 54

38 POWER7 and POWER7+ Optimization and Tuning Guide
AIX kernel locking services
AIX provides a set of locking services that enforce synchronization by using mechanisms that
are provided by the Power Architecture. These services are documented in online
publications.
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The correct use of these locking services allows code to ensure that shared
memory is accessed by only one producer or consumer of data at a time.
Associated instructions
The following instructions provide various storage synchronization mechanisms:
sync This instruction provides an ordering function, so that all instructions issued before
the sync complete and no subsequent instructions are issued until after the sync
completes.
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lwsync This instruction provides an ordering function similar to sync, but it is only applicable
to load, store, and dcbz instructions that are run by the processor (hardware
thread) running the lwsync instruction, and only for specific combinations of storage
control attributes.
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lwarx This instruction reserves a storage location for subsequent store using a stcwx
instruction and notifies the memory coherence mechanism of the reservation.
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stcwx This instruction performs a store to the target location only if the location specified
by a previous lwarx instruction is not used for storage by another processor
(hardware thread) or mechanism, which invalidates the reservation.
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eieio This instruction creates a memory barrier that provides an order for storage
accesses caused by load, store, dcbz, eciwx, and ecowx instructions.
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Where to use
Care must be taken when you use synchronization mechanisms in any processor architecture
because the associated load and store instructions have a heavier weight than normal loads
and stores and the barrier operations have a cost that is associated with them. Thus, it is
imperative that the programmer carefully consider when and where to use such operations,
so that data consistency is ensured without adversely affecting the performance of the
software and the overall system.
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Locking Kernel Services, available at:
http://pic.dhe.ibm.com/infocenter/aix/v7r1/topic/com.ibm.aix.kernelext/doc/kernextc/lock_kernsvcs.ht
m
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sync (Synchronize) or dcs (Data Cache Synchronize) Instruction. available at:
http://publib.boulder.ibm.com/infocenter/aix/v7r1/index.jsp?topic=/com.ibm.aix.aixassem/doc/alangref
/sync.htm
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PowerPC storage model and AIX programming: What AIX programmers need to know about how their software
accesses shared storage, Michael Lyons, et al, available at:
http://www.ibm.com/developerworks/systems/articles/powerpc.html
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lwarx (Load Word and Reserve Indexed) Instruction, available at:
http://pic.dhe.ibm.com/infocenter/aix/v7r1/topic/com.ibm.aix.aixassem/doc/alangref/idalangref_lwarx_
lwri_instrs.htm
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stwcx (Store Word Conditional Indexed) Instruction, available at:
http://pic.dhe.ibm.com/infocenter/aix/v7r1/topic/com.ibm.aix.aixassem/doc/alangref/idalangref_stwcx_
instrs.htm
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eieio instruction, available at:
http://pic.dhe.ibm.com/infocenter/aix/v7r1/topic/com.ibm.aix.aixassem/doc/alangref/idalangref_eieio_
instrs.htm