IBM Power7 - Page 68

52 POWER7 and POWER7+ Optimization and Tuning Guide
򐂰 Multiprocessing, found at:
http://publib.boulder.ibm.com/infocenter/aix/v7r1/topic/com.ibm.aix.prftungd/do
c/prftungd/intro_mulitproc.htm
򐂰 The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System,
found at:
http://www.microarch.org/micro36/html/pdf/lu-PerformanceRuntimeData.pdf
򐂰 POWER6 Decimal Floating Point (DFP), found at:
http://www.ibm.com/developerworks/wikis/display/WikiPtype/Decimal+Floating+Poin
t
򐂰 POWER7 Processors: The Beat Goes On, found at:
http://www.ibm.com/developerworks/wikis/download/attachments/104533501/POWER7+-
+The+Beat+Goes+On.pdf
򐂰 Power Architecture ISA 2.06 Stride N prefetch Engines to boost Application's
performance, found at:
https://www.power.org/documentation/whitepaper-on-stride-n-prefetch-feature-of-
isa-2-06/ (registration required)
򐂰 Power ISA Version 2.06 Revision B, found at:
http://power.org/wp-content/uploads/2012/07/PowerISA_V2.06B_V2_PUBLIC.pdf
Refer to the following sections:
– Section 3.1: Program Priority Registers
– Section 3.2: “or” Instruction
– Section 4.3.4: Program Priority Register
– Section 4.4.3: OR Instruction
– Section 5.3.4: Program Priority Register
– Section 5.4.2: OR Instruction
– Book I – 4 Floating Point Facility
– Book I – 5 Decimal Floating Point
– Book I – 6 Vector Facility
– Book I – 7 Vector-Scalar Floating Point Operations (VSX)
– Book I – Chapter 5 Decimal Floating-Point.
– Book II – 4.2 Data Stream Control Register
– Book II – 4.3.2 Data Cache Instructions
– Book II – 4.4 Synchronization Instructions
– Book II – A.2 Load and Reserve Mnemonics
– Book II – A.3 Synchronize Mnemonics
– Book II – Appendix B. Programming Examples for Sharing Storage
– Book III – 5.7 Storage Addressing
򐂰 PowerPC storage model and AIX programming: What AIX programmers need to know
about how their software accesses shared storage, found at:
http://www.ibm.com/developerworks/systems/articles/powerpc.html
Refer to the following sections:
– Power Instruction Set Architecture
– Section 4.4.3 Memory Barrier Instructions – Synchronize
򐂰 Product documentation for XL C/C++ for AIX, V12.1 (PDF format), found at:
http://www.ibm.com/support/docview.wss?uid=swg27024811