74 POWER7 and POWER7+ Optimization and Tuning Guide
1 TB segments are a feature present in POWER5+, POWER6, and POWER7 processors.
They can be used to reduce the hardware virtual to real translation impact. Applications that
are 64-bit and that have large shared memory regions can benefit from incorporating
1 TB segments.
An overview of 1 TB segment usage can be found in the IBM AIX Version 7.1 Differences
Guide, SG24-7910.
For more information about this topic, see 4.4, “Related publications” on page 94.
64-bit versus 32-bit Application Binary Interfaces
AIX provides complete support for both 32-bit and 64-bit Application Binary Interface (ABIs).
Applications can be developed using either ABI with some performance trade-offs. The 64-bit
ABI provides more scaling benefits. With both ABIs, there are performance trade-offs to
be considered.
Overview of 64-bit/32-bit Application Binary Interface
All current POWER processors support a 32-bit and 64-bit execution mode. The 32-bit
execution mode is a subset of the 64-bit execution mode. The modes are similar, where the
most significant difference is addresses in address generation (effective addresses are
truncated to 32 bits) and computation of some fixed-point status registers (carry, overflow,
and so on). Although hardware 32-bit/64-bit mode does not affect performance, the
32-bit/64-bit ABIs provided by AIX do have performance implications and tradeoffs.
The 32-bit ABI provides an ILP32 model (32-bit integers, longs, and pointers) while the 64-bit
ABI provides an LP64 model (32-bit integer and 64-bit longs/pointers). Although current
POWER CPUs have 64-bit fixed-point registers, they are treated as 32-bit fixed-point
registers by the ABI (the high 32 bits of all fixed-point registers are treated as volatile or
undefined by the ABI). The 32-bit ABI preserves only 32-bit fixed-point context across
subroutine linkage, non-local goto (longjmp()), or signal delivery. 32-bit programs cannot
attempt to use 64-bit registers when they run in 32-bit mode (32-bit ABI). In general, other
registers (floating point, vector, and status registers) are the same size in both
32-bit/64-bit ABIs.
Starting with AIX V6.1 all supervisor code (kernel, kernel extensions, and device drivers) uses
the 64-bit ABI. In general, a unified system call interface is provided to applications that
provides efficient system call linkage to both 32-bit and 64-bit applications. Because the AIX
V 6.1 kernel is 64-bit, it implies that all systems supported by AIX V 6.1 support the 64-bit
ABI. Some older IBM PowerPC® CPUs supported on AIX 5L V 5.3 cannot run the 64-bit ABI.
Operating system libraries provide both 32-bit and 64-bit objects, allowing full support for
either ABI. Development tools (assembler, linker, and debuggers) support both ABIs.
Trade-offs
The primary motivation to choose the 64-bit ABI is to go beyond the 4 GB directly memory
addressability barrier. A second reason is to improve scalability by extending some 32-bit
data type limits that are in the 32-bit ABI (time_t, pid_t, and offset_t). Lastly, 64-bit mode
provides access to 64-bit fixed-point registers and instructions that can improve the
performance of specific fixed-point operations (long long arithmetic and 64-bit
memory copies).
The 64-bit ABI does have some performance drawbacks, such as the 64-bit fixed-point
registers and the LP64 model grow stack usage and data structures. These items can cause
a performance drawback for some applications. Also, 64-bit text is generally larger for most
compiles, producing a larger i-cache footprint.
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