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Icom IC-730 - SSB OPERATION GUIDE

Icom IC-730
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inverter, then Pin6
of
1C3
as a switching signal. The other
waveform-shaped signal
is
output
from pin3
of
IC2 and
differentiated by C12 and
Rl0,
then fed
to
pinl
of
IC3,
inverter. The
output
signal from pin3
of
IC3
is
also dif-
ferentiated by
Cll
and R9, then fed
to
pins 5 and 12
of
1C3.
To the other gates
of
1C3,
the
switching signal
is
applied and controlled the differentiated signals. The
output
signals from pins 4 and
11
of
1C3
are fed
to
2-
input
NOR
gate
of
IC3
and combined
as
the
UP
signal.
This
UP
signal
is
fed
to
CP
terminal of IC5, flip-flop, and
it holds the
output
terminal, pin 13,
H-Ievel
when the
UP
signal
is
present. This
H-Ievel
signal
is
then fed
to
B3
terminal
of
the CPU, and the
CPU
processes
to
increase
the operating frequency. When
the
tuning control
is
turned counterclockwise,
the
B3
terminal
is
maintained
in
the
.L-Ievel.
Two differentiated signals
at
C12 and
Cll
are fed
to
pins
5 and 6
of
IC2,
OR
gate, and combined signal
is
~utPut
from pin4. The rotary encoder
outputs
50
pulses per
revolution, while pin4 of
IC2
outputs
both leading edge
and trailing edge, resulting in an
output
of 100 pulses per
revolution. This
output
signal
is
fed
to
a counter
of
3-bit,
consisting of
1C4
and a half of IC5.
This counter
is
capable of counting a maximum
of
7
pulses, and serves as a timing buffer between the encoder
and the display
in
relation
to
reading by
the
CPU.
If
there
is
any
output
at
the counter,
the
output
of
the diode
OR
gate, consisting
of
05
throug,
07,
becomes H-Ievel, input
to
inverter, IC8, then input
to
the
INT terminal
of
the
CPU
with its
level
inverted
to
L-Ievel.
This terminal
is
a priority
terminal which
gives
priority
to
sensor processing by
stopping other operations.
In
the priority routine, counter
data and up-down data fed
to
BO
throug,
B3
terminals
are read by the CPU, performing
in
this way
all
operations
related
to
sensor processing.
Immediately after the sensor data have been read, a reset
pulse
is
put
out
from
IlJ
terminal, and the pulse
is
differ-
entiated by C5 and R46, then fed
to
clear terminals
of
the counter and up-down latch
to
clear them.
The up-down control circuit consisting of
03,
04,
R16
through R21,
C17
throug,
C21, etc., provides frequency
control from
the
up-down switches on
the
microphone.
When the
UP
or
DOWN
button
is
depressed,
the
multi-
vibrator,
03,
oscillates and pulses are fed
to
pin6
of
IC4,
and the 3-bit counter counts
the
pulses the same as
the
pulses from
the
rotary encoder.
After processing, the
CPU
outputs
frequency data for the
PLL from the
port
E.
This data
is
a 4-bit parallel data and
it
is
output
in
sequence according
to
its digits. The
port
E
also
output
frequency data for the display with time
sharing. This data
is
4-bit parallel and 8-digit data.
FO
and
F2 terminals
output
clock pulses for the display and
Fl
terminal outputs clock pulse for
the
PLl.
Data for 1kHz
and lower digits are
output
from
the
ports C and
0,
and fed
to
DIA converter consisting
of
R35 through R43
to
convert
into a analog signal. This analog signal
is
fed
to
the
2nd
3-8
local oscillator
in
the
2nd
IF
unit
to
get 10Hz step fre-
quency resolution.
3 - 4 DISPLAY
UNIT
This unit
is
composed of
DS1
display tube, ICl driver
IC
and
DC-DC
converter for the display tube and negative
voltage source.
The frequency data
is
fed
to
pins 2 through 5, input
port
S,
and timing control pulse
is
fed
to
pin 15. After processing,
segment data
is
put
out
from pins 16
throug,
22 with digit
control signal
put
out
from pins 6 through 11. These signals
are fed
to
the
display
tube
and light
the
tube with dynamic
lighting.
The
DC-DC
converter
is
composed of
01,
L1,
Rl
through
R3,
Cl
through
C4,
01
through
04,
etc. This converter
generates a negative voltage and filament voltage for the
display tube, and
-5V
for the
AGC
circuit and operational
ampl ifiers.
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