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Intel 80286 - Page 231

Intel 80286
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THE
80286
INSTRUCTION SET
ARPL
- Adjust
RPL
Field
of
Selector
Opcode
Instruction
63 Ir
ARPL ew,rw
FLAGS MODIFIED
Zero
FLAGS UNDEFINED
None
OPERATION
Clocks.
10,mem=11
Description
Adjust
RPL
of
EA
word not less
than
RPL of
rw
The ARPL instruction has
two
operands. The first operand
is
a 16-bit memory variable or
word
register
that contains the value of a selector. The second operand
is
a word register.
If
the RPL
field
(bottom
two bits) of the first operand
is
less than the RPL field of the second operand, then the
zero
flag
is
set
to 1 and the RPL field of the first operand
is
increased to match the second RPL. Otherwise, the zero
flag
is
set to 0 and
no
change
is
made to the first operand.
ARPL appears
in
operating systems software, not
in
applications programs.
It
is
used to guarantee that
a selector parameter to a subroutine does not request more privilege than the caller
was
entitled
to.
The second operand used by ARPL would normally be a register that contains the CS selector value
of the caller.
PROTECTED MODE EXCEPTIONS
#GP(O) if the result
is
in
a non-writable segment. #GP(O) for an illegal memory operand effective
address in the CS, DS, or ES segments;
#SS(O)
for an illegal address
in
the SS segment.
REAL
ADDRESS MODE EXCEPTIONS
Interrupt
6.
ARPL
is
not recognized in Real Address mode.
8-21
pcjs.org

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