Inter-m SYSTEM-2120 - Page 9

BLOCK DIAGRAM
15
Program
StatusWord
Arithmetic
and
LogicUnit
InstructionDecoder
Internal
Interrupts
RESET
Interrupt
Control
Block
Instruction
Register
Clock
16K-Byte
ProgramMemory
512x4-Bit
DataMemory
Timer/
Counter0
XIN
XOUT
Program
Counter
I/OPort6
I/OPort5
Stack
Pointer
PLL
Synthesizer
LCDDriver/
Controller
Watchdog
Timer
Basic
Timer
A/D
Converter
P5.0/ADC0 P5.3/ADC3 P5.1/ADC1 P5.2/ADC2
Serial
I/OPort
I/OPort4 I/OPort3 I/OPort2 I/OPort0
OutputPort
7,8,9,10
OutputPort
11,12,13
IF
Counter
P4.0/
SCK
P4.3/CLO
P4.1/SO
P4.2/SI
P3.0 P3.3 P3.1 P3.2 P2.0 P2.3 P2.1 P2.2
P1.0/INT0 P1.3/INT4 P1.1/INT1 P1.2/INT2
P10.0-P10.3 /SEG12-SEG15 P7.0-P7.3 /SEG0-SEG3 P9.0-P9.3 /SEG8-SEG11 P8.0-P8.3 /SEG4-SEG7 P6.0-P6.3 KS0-KS3 P13.0-P13.3 /SEG24-SEG27 P12.0-P12.3 /SEG20-SEG23 P11.0-P11.3 /SEG16-SEG19 BIAS VLC0-VLC2 COM0-COM3 VCOAM VCOFM EO AMIF FMIF
CE
XTIN
XTOUT
InputPort1
P0.0/BTCO
P0.3/BUZ
P0.1/TCLO0
P0.2/TCL0
Watch
Timer
INT0-INT4
FEATURES
Memory
• 512-nibble RAM
• 16K-byte ROM
I/O Pins
• Input only: 4 pins
• Output only: 28 pins
• I/O: 24 pins
LCD Controller/Driver
• Maximum 14-digit LCD direct drive capability
• 28 segment x 4 common signals
• Display modes: Static, 1/2 duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
8-Bit Basic Timer
• Programmable interval timer functions
• Watch-dog timer function
8-Bit Timer/Counter
• Programmable 8-bit timer
• External event counter
• Arbitrary clock frequency output
• External clock signal divider
• Serial I/O interface clock generator
Watch Timer
• Time interval generation
: 0.5 s, 3.9 ms at 32.768 kHz
• Frequency outputs to BUZ pin
• Clock source generation for LCD
8-Bit Serial I/O Interface
• 8-bit transmit/receive mode
• 8-bit receive mode
• Data direction selectable (LSB-first or MSB-first)
• Internal or external clock source
A/D Converter
• 4-channels with 8-bit resolution
Bit Sequential Carrier Buffer
• Support 16-bit serial data transfer in arbitrary
format
PLL Frequency Synthesizer
• Level=300 mVp-p (min)
• AMVCO range=0.5 MHz to 30 MHz
• FMVCO range=30 MHz to 150 MHz
16-Bit Intermediate Frequency (IF) Counter
• Level=300 mVp-p (min)
• AMIF rante=100 kHz to 1 MHz
• FMIF range=5 MHz to 15 MHz
Interrupts
• Four internal vectored interrupts
• Four external vectored interrupts
• Two quasi-interrupts
Memory-Mapped I/O Structure
• Data memory bank 15
Three Power-Down Modes
• Idle: Only CPU clock stops
• Stop1: Main system or subsystem clock stops
• Stop2: Main system and subsystem clock stop
• CE low: PLL and IFC stop
Oscillation Sources
• Crystal or ceramic oscillator for main system
clock
• Crystal for subsystem clock
• Main system clock frequency: 4.5 MHz (Typ)
• Subsystem clock frequency: 32.768 kHz (Typ)
• CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
• 0.9, 1.8, 14.2 µs at 4.5 MHz
• 122 µs at 32.768 kHz (subsystem)
Operating Temperature
• –40°C to 85°C
Operating Voltage Range
• 1.8V to 5.5V at 3 MHz
• PLL/IFC operation: 2.5V to 3.5V or 4.0V to 5.5V
Package Type
• 80-pin QFP
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