iSystem iC5000 - 20-pin 1.27 mm Cortex Debug Adapter; Target Side Pinout; Fuse Protection and Serial Resistors; Connector Options

 iSYSTEM, October 2016 18/69
Trace Line Calibration result
Measured by oscilloscope
Emulation Notes
Above message can occur when using trace. It indicates that the DDR (trace storage RAM) input FIFO, which
accepts trace data from the system domain, has overflowed, and some portion of the trace data will be missing. It
doesn’t mean any hardware failure. Possible solutions:
 lower the target CPU clock
 increase Nexus clock divider, which yields lower Nexus clock, but at the same time Nexus is more
prone to overflows then
 changing the trace port width e.g. from 16 bit to 12 bit or from 12 bit to 4 bit reduces the Nexus
information bandwidth. Note that possible port size varies depending on the target CPU.
 IC50000-1 (ordering code) has higher trace storage bandwidth than IC50000.