JVC KD-X120EE User Manual

(No.MA606<Rev.002>)8/20
38 Vss - GND
39 RESET I Reset Input
40 Vss - GND
41 PLLVcc - Power supply for PLL
42 PAN_DET I Panel Detection input L: Panel Attached/
H: Panel Detached
43 Vcc - Power supply
44 EXTAL I High Speed Clock 12MHz
45 XTAL O High Speed Clock 12MHz
46 Vss - GND
47 Vss - GND
48 PVcc - Power supply for I/O circuits
49 D-0 I/O USB Data- 0
50 D+0 I/O USB Data+ 0
51 ASEMD I ASE Mode Select Pin
52 NC I No Use
53 BT_MUTE I BT Mute L: Mute OFF/H: Mute ON
53 NC I No Use (for non BT model)
54 STAGE2 I Model Selecting Input 2
54 STEERING_REMO
2
I OE Remote In 2 (for DOP models)
55 STAGE1 I Model Selecting Input 1
55 STEERING_REMO
1
I OE Remote In 1 (for DOP models)
56 TEL_MUTE I Tel Mute Detection Input (for JVC Model)
56 LINE_MUTE I Line Mute Detection Input (For KWD Model)
56 No Use I No Use (for non support Tel mute model)
57 DC_ERR1 I Detect DC Offset Error from EVOL IC L: DC Error ON/
H: DC Error OFF
58 Avss - GND
59 Avcc - Power Supply
60 Avref - Reference Power Supply
61 TRST I Debugging Interface. Reset Input.
62 ASEBRKAK/ASE-
BRK
I/O Emulator Break Mode Acknoledge/Break Input
63 TDO O Debugging Interface. Serial Output for Instructions and Data
64 TDI I Debugging Interface. Serial Input for Instructions and Data
65 TMS I Debugging Interface. Test Mode Select Signal Input.
66 TCK I Debugging Interface. Test Clock Input.
67 AUDIO_X2 O Audio Clock 16.9MHz (for External DAC)
68 AUDIO_X1 I Audio Clock 16.9MHz (for External DAC)
69 PVcc - Power supply for I/O circuits
70 SPBCLK O FLASH SPI Multi I/O Bus Clock output
71 Vss - GND
72 SPBSSL O FLASH SPI Multi I/O Bus Slave Select Output
73 SPBIO0 I/O FLASH SPI Multi I/O Bus I/O Data 0
74 SPBIO1 I/O FLASH SPI Multi I/O Bus I/O Data 1
Pin No. Pin Name I/O Application
Processing/Operation/
Description

JVC KD-X120EE Specifications

General

Brand	JVC
Model	KD-X120EE
Category	Receiver
Language	English